IRDMA_GLINT_DYN_CTL

141

wr32(dev->hw, i40iw_regs[IRDMA_GLINT_DYN_CTL] + 4 * (idx - 1), val);

151

wr32(dev->hw, i40iw_regs[IRDMA_GLINT_DYN_CTL] + 4 * (idx - 1), 0);

72

writel(val, dev->hw_regs[IRDMA_GLINT_DYN_CTL] + idx);

74

writel(val, dev->hw_regs[IRDMA_GLINT_DYN_CTL] + (idx - 1));

85

writel(0, dev->hw_regs[IRDMA_GLINT_DYN_CTL] + idx);

87

writel(0, dev->hw_regs[IRDMA_GLINT_DYN_CTL] + (idx - 1));

26

writel(val, dev->hw_regs[IRDMA_GLINT_DYN_CTL] + (idx * int_stride));

43

writel(0, dev->hw_regs[IRDMA_GLINT_DYN_CTL] + (idx * int_stride));

37

{IRDMA_VCHNL_REG_ID_DYN_CTL, IRDMA_GLINT_DYN_CTL, false },