Symbol: IRQ_INTERNAL_BASE
arch/mips/bcm63xx/irq.c
115
unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
arch/mips/bcm63xx/irq.c
137
unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
arch/mips/bcm63xx/irq.c
429
ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
arch/mips/bcm63xx/irq.c
430
ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
arch/mips/bcm63xx/irq.c
468
ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
arch/mips/bcm63xx/irq.c
469
ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
arch/mips/bcm63xx/irq.c
480
ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
arch/mips/bcm63xx/irq.c
481
ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
arch/mips/bcm63xx/irq.c
492
ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
arch/mips/bcm63xx/irq.c
493
ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
arch/mips/bcm63xx/irq.c
50
do_IRQ(intbit + IRQ_INTERNAL_BASE);
arch/mips/bcm63xx/irq.c
518
for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
1003
#define BCM_6368_XTM_IRQ (IRQ_INTERNAL_BASE + 11)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
1008
#define BCM_6368_EXT_IRQ0 (IRQ_INTERNAL_BASE + 20)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
1009
#define BCM_6368_EXT_IRQ1 (IRQ_INTERNAL_BASE + 21)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
1010
#define BCM_6368_EXT_IRQ2 (IRQ_INTERNAL_BASE + 22)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
1011
#define BCM_6368_EXT_IRQ3 (IRQ_INTERNAL_BASE + 23)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
1012
#define BCM_6368_EXT_IRQ4 (IRQ_INTERNAL_BASE + 24)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
1013
#define BCM_6368_EXT_IRQ5 (IRQ_INTERNAL_BASE + 25)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
645
#define BCM_3368_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
646
#define BCM_3368_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
647
#define BCM_3368_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
648
#define BCM_3368_UART1_IRQ (IRQ_INTERNAL_BASE + 3)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
652
#define BCM_3368_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
653
#define BCM_3368_ENET1_IRQ (IRQ_INTERNAL_BASE + 6)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
654
#define BCM_3368_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
655
#define BCM_3368_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 15)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
656
#define BCM_3368_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 16)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
666
#define BCM_3368_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 17)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
667
#define BCM_3368_ENET1_TXDMA_IRQ (IRQ_INTERNAL_BASE + 18)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
668
#define BCM_3368_PCI_IRQ (IRQ_INTERNAL_BASE + 31)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
682
#define BCM_3368_EXT_IRQ0 (IRQ_INTERNAL_BASE + 25)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
683
#define BCM_3368_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
684
#define BCM_3368_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
685
#define BCM_3368_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
691
#define BCM_6328_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
693
#define BCM_6328_TIMER_IRQ (IRQ_INTERNAL_BASE + 31)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
695
#define BCM_6328_UART0_IRQ (IRQ_INTERNAL_BASE + 28)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
697
#define BCM_6328_DSL_IRQ (IRQ_INTERNAL_BASE + 4)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
701
#define BCM_6328_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
702
#define BCM_6328_HSSPI_IRQ (IRQ_INTERNAL_BASE + 29)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
705
#define BCM_6328_USBD_IRQ (IRQ_INTERNAL_BASE + 4)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
706
#define BCM_6328_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 5)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
707
#define BCM_6328_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 6)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
708
#define BCM_6328_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 7)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
709
#define BCM_6328_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 8)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
710
#define BCM_6328_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 9)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
711
#define BCM_6328_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 10)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
717
#define BCM_6328_PCI_IRQ (IRQ_INTERNAL_BASE + 23)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
730
#define BCM_6328_PCM_DMA0_IRQ (IRQ_INTERNAL_BASE + 2)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
731
#define BCM_6328_PCM_DMA1_IRQ (IRQ_INTERNAL_BASE + 3)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
732
#define BCM_6328_EXT_IRQ0 (IRQ_INTERNAL_BASE + 24)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
733
#define BCM_6328_EXT_IRQ1 (IRQ_INTERNAL_BASE + 25)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
734
#define BCM_6328_EXT_IRQ2 (IRQ_INTERNAL_BASE + 26)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
735
#define BCM_6328_EXT_IRQ3 (IRQ_INTERNAL_BASE + 27)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
740
#define BCM_6338_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
741
#define BCM_6338_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
742
#define BCM_6338_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
744
#define BCM_6338_DSL_IRQ (IRQ_INTERNAL_BASE + 5)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
745
#define BCM_6338_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
747
#define BCM_6338_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
758
#define BCM_6338_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 15)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
759
#define BCM_6338_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 16)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
779
#define BCM_6345_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
781
#define BCM_6345_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
783
#define BCM_6345_DSL_IRQ (IRQ_INTERNAL_BASE + 3)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
784
#define BCM_6345_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
786
#define BCM_6345_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
797
#define BCM_6345_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 1)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
798
#define BCM_6345_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 2)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
818
#define BCM_6348_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
819
#define BCM_6348_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
820
#define BCM_6348_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
822
#define BCM_6348_DSL_IRQ (IRQ_INTERNAL_BASE + 4)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
823
#define BCM_6348_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
824
#define BCM_6348_ENET1_IRQ (IRQ_INTERNAL_BASE + 7)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
825
#define BCM_6348_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
827
#define BCM_6348_OHCI0_IRQ (IRQ_INTERNAL_BASE + 12)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
836
#define BCM_6348_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 20)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
837
#define BCM_6348_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 21)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
838
#define BCM_6348_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 22)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
839
#define BCM_6348_ENET1_TXDMA_IRQ (IRQ_INTERNAL_BASE + 23)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
840
#define BCM_6348_PCI_IRQ (IRQ_INTERNAL_BASE + 24)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
841
#define BCM_6348_PCMCIA_IRQ (IRQ_INTERNAL_BASE + 24)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
842
#define BCM_6348_ATM_IRQ (IRQ_INTERNAL_BASE + 5)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
857
#define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
858
#define BCM_6358_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
859
#define BCM_6358_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
860
#define BCM_6358_UART1_IRQ (IRQ_INTERNAL_BASE + 3)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
861
#define BCM_6358_DSL_IRQ (IRQ_INTERNAL_BASE + 29)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
862
#define BCM_6358_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
863
#define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
864
#define BCM_6358_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
866
#define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
867
#define BCM_6358_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
875
#define BCM_6358_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 15)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
876
#define BCM_6358_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 16)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
877
#define BCM_6358_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 17)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
878
#define BCM_6358_ENET1_TXDMA_IRQ (IRQ_INTERNAL_BASE + 18)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
879
#define BCM_6358_PCI_IRQ (IRQ_INTERNAL_BASE + 31)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
880
#define BCM_6358_PCMCIA_IRQ (IRQ_INTERNAL_BASE + 24)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
881
#define BCM_6358_ATM_IRQ (IRQ_INTERNAL_BASE + 19)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
893
#define BCM_6358_PCM_DMA0_IRQ (IRQ_INTERNAL_BASE + 23)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
894
#define BCM_6358_PCM_DMA1_IRQ (IRQ_INTERNAL_BASE + 24)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
895
#define BCM_6358_EXT_IRQ0 (IRQ_INTERNAL_BASE + 25)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
896
#define BCM_6358_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
897
#define BCM_6358_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
898
#define BCM_6358_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
903
#define BCM_6362_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
905
#define BCM_6362_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
906
#define BCM_6362_SPI_IRQ (IRQ_INTERNAL_BASE + 2)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
907
#define BCM_6362_UART0_IRQ (IRQ_INTERNAL_BASE + 3)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
908
#define BCM_6362_UART1_IRQ (IRQ_INTERNAL_BASE + 4)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
909
#define BCM_6362_DSL_IRQ (IRQ_INTERNAL_BASE + 28)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
913
#define BCM_6362_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 14)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
914
#define BCM_6362_HSSPI_IRQ (IRQ_INTERNAL_BASE + 5)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
915
#define BCM_6362_OHCI0_IRQ (IRQ_INTERNAL_BASE + 9)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
916
#define BCM_6362_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
917
#define BCM_6362_USBD_IRQ (IRQ_INTERNAL_BASE + 11)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
918
#define BCM_6362_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 20)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
919
#define BCM_6362_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 21)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
920
#define BCM_6362_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 22)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
921
#define BCM_6362_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 23)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
922
#define BCM_6362_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 24)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
923
#define BCM_6362_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 25)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
929
#define BCM_6362_PCI_IRQ (IRQ_INTERNAL_BASE + 30)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
942
#define BCM_6362_RING_OSC_IRQ (IRQ_INTERNAL_BASE + 1)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
943
#define BCM_6362_WLAN_GPIO_IRQ (IRQ_INTERNAL_BASE + 6)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
944
#define BCM_6362_WLAN_IRQ (IRQ_INTERNAL_BASE + 7)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
945
#define BCM_6362_IPSEC_IRQ (IRQ_INTERNAL_BASE + 8)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
946
#define BCM_6362_NAND_IRQ (IRQ_INTERNAL_BASE + 12)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
947
#define BCM_6362_PCM_IRQ (IRQ_INTERNAL_BASE + 13)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
948
#define BCM_6362_DG_IRQ (IRQ_INTERNAL_BASE + 15)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
949
#define BCM_6362_EPHY_ENERGY0_IRQ (IRQ_INTERNAL_BASE + 16)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
950
#define BCM_6362_EPHY_ENERGY1_IRQ (IRQ_INTERNAL_BASE + 17)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
951
#define BCM_6362_EPHY_ENERGY2_IRQ (IRQ_INTERNAL_BASE + 18)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
952
#define BCM_6362_EPHY_ENERGY3_IRQ (IRQ_INTERNAL_BASE + 19)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
953
#define BCM_6362_IPSEC_DMA0_IRQ (IRQ_INTERNAL_BASE + 26)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
954
#define BCM_6362_IPSEC_DMA1_IRQ (IRQ_INTERNAL_BASE + 27)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
955
#define BCM_6362_FAP0_IRQ (IRQ_INTERNAL_BASE + 29)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
968
#define BCM_6368_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
970
#define BCM_6368_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
971
#define BCM_6368_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
972
#define BCM_6368_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
973
#define BCM_6368_UART1_IRQ (IRQ_INTERNAL_BASE + 3)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
974
#define BCM_6368_DSL_IRQ (IRQ_INTERNAL_BASE + 4)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
977
#define BCM_6368_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 15)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
979
#define BCM_6368_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
980
#define BCM_6368_EHCI0_IRQ (IRQ_INTERNAL_BASE + 7)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
981
#define BCM_6368_USBD_IRQ (IRQ_INTERNAL_BASE + 8)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
982
#define BCM_6368_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 26)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
983
#define BCM_6368_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 27)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
984
#define BCM_6368_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 28)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
985
#define BCM_6368_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 29)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
986
#define BCM_6368_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 30)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
987
#define BCM_6368_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 31)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
993
#define BCM_6368_PCI_IRQ (IRQ_INTERNAL_BASE + 13)