arch/powerpc/sysdev/ipic.c

323

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

330

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

337

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

344

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

351

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

358

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

365

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

372

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

379

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

385

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

391

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

397

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

403

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

409

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

415

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

421

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

427

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

433

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

439

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

445

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

451

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

457

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

463

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

469

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

475

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

481

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

487

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

493

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

499

.mask = IPIC_SIMSR_L,

arch/powerpc/sysdev/ipic.c

764

ipic_write(ipic->regs, IPIC_SIMSR_L, 0);

arch/powerpc/sysdev/ipic.c

828

ipic_saved_state.simsr[1] = ipic_read(ipic->regs, IPIC_SIMSR_L);

arch/powerpc/sysdev/ipic.c

843

ipic_write(ipic->regs, IPIC_SIMSR_L, 0);

arch/powerpc/sysdev/ipic.c

859

ipic_write(ipic->regs, IPIC_SIMSR_L, ipic_saved_state.simsr[1]);