arch/mips/include/asm/mach-ath79/ar71xx_regs.h

102

#define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

105

#define QCA953X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

107

#define QCA953X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

111

#define QCA953X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

115

#define QCA953X_PCI_CTRL_BASE0 (AR71XX_APB_BASE + 0x000f0000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

116

#define QCA953X_PCI_CRP_BASE0 (AR71XX_APB_BASE + 0x000c0000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

126

#define QCA955X_PCI_CRP_BASE0 (AR71XX_APB_BASE + 0x000c0000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

127

#define QCA955X_PCI_CRP_BASE1 (AR71XX_APB_BASE + 0x00250000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

129

#define QCA955X_PCI_CTRL_BASE0 (AR71XX_APB_BASE + 0x000f0000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

130

#define QCA955X_PCI_CTRL_BASE1 (AR71XX_APB_BASE + 0x00280000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

133

#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

135

#define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

147

#define QCA956X_PCI_CRP_BASE1 (AR71XX_APB_BASE + 0x00250000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

149

#define QCA956X_PCI_CTRL_BASE1 (AR71XX_APB_BASE + 0x00280000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

152

#define QCA956X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

157

#define QCA956X_GMAC_SGMII_BASE (AR71XX_APB_BASE + 0x00070000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

159

#define QCA956X_PLL_BASE (AR71XX_APB_BASE + 0x00050000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

161

#define QCA956X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

31

#define AR71XX_DDR_CTRL_BASE (AR71XX_APB_BASE + 0x00000000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

33

#define AR71XX_UART_BASE (AR71XX_APB_BASE + 0x00020000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

35

#define AR71XX_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

37

#define AR71XX_GPIO_BASE (AR71XX_APB_BASE + 0x00040000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

39

#define AR71XX_PLL_BASE (AR71XX_APB_BASE + 0x00050000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

41

#define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

43

#define AR71XX_MII_BASE (AR71XX_APB_BASE + 0x00070000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

62

#define AR7240_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

72

#define AR724X_PCI_CRP_BASE (AR71XX_APB_BASE + 0x000c0000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

74

#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000f0000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

82

#define AR913X_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

85

#define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

87

#define AR933X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

89

#define AR933X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

94

#define AR934X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)

arch/mips/include/asm/mach-ath79/ar71xx_regs.h

96

#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)