IP3_27_24
PINMUX_IPSR_GPSR(IP3_27_24, QSPI0_IO3),
PINMUX_IPSR_GPSR(IP3_27_24, RD_N),
#define GPSR1_15 F_(A15, IP3_27_24)
FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
IP3_27_24
PINMUX_IPSR_GPSR(IP3_27_24, A15),
PINMUX_IPSR_GPSR(IP3_27_24, LCDOUT15),
PINMUX_IPSR_MSEL(IP3_27_24, MSIOF3_TXD_C, SEL_MSIOF3_2),
PINMUX_IPSR_GPSR(IP3_27_24, HRTS4_N),
PINMUX_IPSR_GPSR(IP3_27_24, VI5_DATA11),
PINMUX_IPSR_GPSR(IP3_27_24, DU_DG7),
#define GPSR1_15 F_(A15, IP3_27_24)
FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
IP3_27_24
PINMUX_IPSR_GPSR(IP3_27_24, A15),
PINMUX_IPSR_GPSR(IP3_27_24, LCDOUT15),
PINMUX_IPSR_MSEL(IP3_27_24, MSIOF3_TXD_C, SEL_MSIOF3_2),
PINMUX_IPSR_GPSR(IP3_27_24, HRTS4_N),
PINMUX_IPSR_GPSR(IP3_27_24, VI5_DATA11),
PINMUX_IPSR_GPSR(IP3_27_24, DU_DG7),
#define GPSR1_15 F_(A15, IP3_27_24)
FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
IP3_27_24
PINMUX_IPSR_GPSR(IP3_27_24, A15),
PINMUX_IPSR_GPSR(IP3_27_24, LCDOUT15),
PINMUX_IPSR_MSEL(IP3_27_24, MSIOF3_TXD_C, SEL_MSIOF3_2),
PINMUX_IPSR_GPSR(IP3_27_24, HRTS4_N),
PINMUX_IPSR_GPSR(IP3_27_24, VI5_DATA11),
PINMUX_IPSR_GPSR(IP3_27_24, DU_DG7),
#define GPSR2_7 F_(VI0_DATA3, IP3_27_24)
IP3_27_24
FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
PINMUX_IPSR_GPSR(IP3_27_24, VI0_DATA3),
PINMUX_IPSR_GPSR(IP3_27_24, HSCK1),
PINMUX_IPSR_MSEL(IP3_27_24, SCL3_A, SEL_I2C3_0),
#define GPSR2_7 F_(VI0_DATA3, IP3_27_24)
IP3_27_24
FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
PINMUX_IPSR_GPSR(IP3_27_24, VI0_DATA3),
PINMUX_IPSR_GPSR(IP3_27_24, HSCK1),
#define GPSR1_7 F_(A7, IP3_27_24)
FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
IP3_27_24
PINMUX_IPSR_GPSR(IP3_27_24, A7),
PINMUX_IPSR_GPSR(IP3_27_24, TX4_A),
PINMUX_IPSR_GPSR(IP3_27_24, MSIOF3_TXD_B),
PINMUX_IPSR_GPSR(IP3_27_24, VI4_DATA11),
PINMUX_IPSR_MSEL(IP3_27_24, RIF2_D1_B, SEL_DRIF2_1),
IP3_27_24
FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \
#define GPSR1_23 F_(DU_DR7, IP3_27_24)
PINMUX_IPSR_GPSR(IP3_27_24, DU_DR7),
PINMUX_IPSR_GPSR(IP3_27_24, LCDOUT23),
PINMUX_IPSR_MSEL(IP3_27_24, TCLK1_B, SEL_TMU_1_1),