IP3_15_12
PINMUX_IPSR_GPSR(IP3_15_12, QSPI0_MOSI_QSPI0_IO0),
PINMUX_IPSR_GPSR(IP3_15_12, BS_N),
#define GPSR1_12 F_(A12, IP3_15_12)
FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
IP3_15_12
PINMUX_IPSR_GPSR(IP3_15_12, A12),
PINMUX_IPSR_GPSR(IP3_15_12, LCDOUT12),
PINMUX_IPSR_MSEL(IP3_15_12, MSIOF3_SCK_C, SEL_MSIOF3_2),
PINMUX_IPSR_MSEL(IP3_15_12, HRX4_A, SEL_HSCIF4_0),
PINMUX_IPSR_GPSR(IP3_15_12, VI5_DATA8),
PINMUX_IPSR_GPSR(IP3_15_12, DU_DG4),
#define GPSR1_12 F_(A12, IP3_15_12)
FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
IP3_15_12
PINMUX_IPSR_GPSR(IP3_15_12, A12),
PINMUX_IPSR_GPSR(IP3_15_12, LCDOUT12),
PINMUX_IPSR_MSEL(IP3_15_12, MSIOF3_SCK_C, SEL_MSIOF3_2),
PINMUX_IPSR_MSEL(IP3_15_12, HRX4_A, SEL_HSCIF4_0),
PINMUX_IPSR_GPSR(IP3_15_12, VI5_DATA8),
PINMUX_IPSR_GPSR(IP3_15_12, DU_DG4),
#define GPSR1_12 F_(A12, IP3_15_12)
FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
IP3_15_12
PINMUX_IPSR_GPSR(IP3_15_12, A12),
PINMUX_IPSR_GPSR(IP3_15_12, LCDOUT12),
PINMUX_IPSR_MSEL(IP3_15_12, MSIOF3_SCK_C, SEL_MSIOF3_2),
PINMUX_IPSR_MSEL(IP3_15_12, HRX4_A, SEL_HSCIF4_0),
PINMUX_IPSR_GPSR(IP3_15_12, VI5_DATA8),
PINMUX_IPSR_GPSR(IP3_15_12, DU_DG4),
#define GPSR2_4 F_(VI0_DATA0, IP3_15_12)
IP3_15_12
FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
PINMUX_IPSR_GPSR(IP3_15_12, VI0_DATA0),
PINMUX_IPSR_GPSR(IP3_15_12, MSIOF2_SS1),
PINMUX_IPSR_GPSR(IP3_15_12, RTS3_N),
PINMUX_IPSR_GPSR(IP3_15_12, HRX3),
#define GPSR2_4 F_(VI0_DATA0, IP3_15_12)
IP3_15_12
FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
PINMUX_IPSR_GPSR(IP3_15_12, VI0_DATA0),
PINMUX_IPSR_GPSR(IP3_15_12, MSIOF2_SS1),
PINMUX_IPSR_GPSR(IP3_15_12, RTS3_N),
PINMUX_IPSR_GPSR(IP3_15_12, HRX3),
#define GPSR1_4 F_(A4, IP3_15_12)
FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
IP3_15_12
PINMUX_IPSR_GPSR(IP3_15_12, A4),
PINMUX_IPSR_MSEL(IP3_15_12, RTS4_N_A, SEL_SCIF4_0),
PINMUX_IPSR_MSEL(IP3_15_12, MSIOF3_SYNC_B, SEL_MSIOF3_1),
PINMUX_IPSR_GPSR(IP3_15_12, VI4_DATA8),
PINMUX_IPSR_MSEL(IP3_15_12, PWM2_B, SEL_PWM2_1),
PINMUX_IPSR_GPSR(IP3_15_12, DU_DG4),
PINMUX_IPSR_MSEL(IP3_15_12, RIF2_CLK_B, SEL_DRIF2_1),
IP3_15_12
FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
PINMUX_IPSR_GPSR(IP3_15_12, DU_DR4),
PINMUX_IPSR_GPSR(IP3_15_12, LCDOUT20),
PINMUX_IPSR_MSEL(IP3_15_12, TCLK2_B, SEL_TMU_0_1),
#define GPSR1_20 F_(DU_DR4, IP3_15_12)