IP3SR1_7_4
#define GPSR1_25 F_(IRQ1, IP3SR1_7_4)
IP3SR1_7_4
FM(IP0SR1_7_4) IP0SR1_7_4 FM(IP1SR1_7_4) IP1SR1_7_4 FM(IP2SR1_7_4) IP2SR1_7_4 FM(IP3SR1_7_4) IP3SR1_7_4 \
PINMUX_IPSR_GPSR(IP3SR1_7_4, IRQ1),
PINMUX_IPSR_GPSR(IP3SR1_7_4, DU_HSYNC),
PINMUX_IPSR_GPSR(IP3SR1_7_4, A25),
IP3SR1_7_4
FM(IP0SR1_7_4) IP0SR1_7_4 FM(IP1SR1_7_4) IP1SR1_7_4 FM(IP2SR1_7_4) IP2SR1_7_4 FM(IP3SR1_7_4) IP3SR1_7_4 \
#define GPSR1_25 F_(HSCK3_A, IP3SR1_7_4)
PINMUX_IPSR_GPSR(IP3SR1_7_4, HSCK3_A),
PINMUX_IPSR_GPSR(IP3SR1_7_4, CTS3_N_A),
PINMUX_IPSR_GPSR(IP3SR1_7_4, MSIOF4_SCK),
PINMUX_IPSR_GPSR(IP3SR1_7_4, TPU0TO0_B),
IP3SR1_7_4
FM(IP0SR1_7_4) IP0SR1_7_4 FM(IP1SR1_7_4) IP1SR1_7_4 FM(IP2SR1_7_4) IP2SR1_7_4 FM(IP3SR1_7_4) IP3SR1_7_4 \
PINMUX_IPSR_GPSR(IP3SR1_7_4, HSCK3_A),
PINMUX_IPSR_GPSR(IP3SR1_7_4, CTS3_N_A),
PINMUX_IPSR_GPSR(IP3SR1_7_4, MSIOF4_SCK),
PINMUX_IPSR_GPSR(IP3SR1_7_4, TPU0TO0_B),
#define GPSR1_25 F_(HSCK3, IP3SR1_7_4)