IP2_3_0
PINMUX_IPSR_GPSR(IP2_3_0, D6),
PINMUX_IPSR_GPSR(IP2_3_0, HTX2),
PINMUX_IPSR_MSEL(IP2_3_0, SDA1_B, SEL_I2C01_1),
PINMUX_IPSR_GPSR(IP2_3_0, PWM4_C),
PINMUX_IPSR_MSEL(IP2_3_0, HRX0, SEL_HSCIF0_0),
PINMUX_IPSR_MSEL(IP2_3_0, RX1, SEL_SCIF1_0),
PINMUX_IPSR_GPSR(IP2_3_0, SCKZ),
PINMUX_IPSR_MSEL(IP2_3_0, RTS0_C_TANS_C, SEL_SCIF0_2),
PINMUX_IPSR_GPSR(IP2_3_0, SUB_TDI),
PINMUX_IPSR_GPSR(IP2_3_0, CC5_STATE3),
PINMUX_IPSR_GPSR(IP2_3_0, CC5_STATE11),
PINMUX_IPSR_GPSR(IP2_3_0, CC5_STATE19),
PINMUX_IPSR_GPSR(IP2_3_0, CC5_STATE27),
PINMUX_IPSR_GPSR(IP2_3_0, CC5_STATE35),
#define GPSR1_1 F_(A1, IP2_3_0)
FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
IP2_3_0 ))
PINMUX_IPSR_GPSR(IP2_3_0, A1),
PINMUX_IPSR_GPSR(IP2_3_0, LCDOUT17),
PINMUX_IPSR_MSEL(IP2_3_0, MSIOF3_TXD_B, SEL_MSIOF3_1),
PINMUX_IPSR_GPSR(IP2_3_0, VI4_DATA9),
PINMUX_IPSR_GPSR(IP2_3_0, DU_DB1),
PINMUX_IPSR_MSEL(IP2_3_0, PWM4_A, SEL_PWM4_0),
#define GPSR1_1 F_(A1, IP2_3_0)
FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
IP2_3_0 ))
PINMUX_IPSR_GPSR(IP2_3_0, A1),
PINMUX_IPSR_GPSR(IP2_3_0, LCDOUT17),
PINMUX_IPSR_MSEL(IP2_3_0, MSIOF3_TXD_B, SEL_MSIOF3_1),
PINMUX_IPSR_GPSR(IP2_3_0, VI4_DATA9),
PINMUX_IPSR_GPSR(IP2_3_0, DU_DB1),
PINMUX_IPSR_MSEL(IP2_3_0, PWM4_A, SEL_PWM4_0),
#define GPSR1_1 F_(A1, IP2_3_0)
FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
IP2_3_0 ))
PINMUX_IPSR_GPSR(IP2_3_0, A1),
PINMUX_IPSR_GPSR(IP2_3_0, LCDOUT17),
PINMUX_IPSR_MSEL(IP2_3_0, MSIOF3_TXD_B, SEL_MSIOF3_1),
PINMUX_IPSR_GPSR(IP2_3_0, VI4_DATA9),
PINMUX_IPSR_GPSR(IP2_3_0, DU_DB1),
PINMUX_IPSR_MSEL(IP2_3_0, PWM4_A, SEL_PWM4_0),
IP2_3_0 ))
FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
PINMUX_IPSR_GPSR(IP2_3_0, DU_DB6),
PINMUX_IPSR_GPSR(IP2_3_0, A16),
PINMUX_IPSR_GPSR(IP2_3_0, FXR_TXENB_N),
#define GPSR0_16 F_(DU_DB6, IP2_3_0)
IP2_3_0 ))
FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
#define GPSR0_16 F_(DU_DB6, IP2_3_0)
PINMUX_IPSR_GPSR(IP2_3_0, DU_DB6),
PINMUX_IPSR_GPSR(IP2_3_0, MSIOF3_RXD),
PINMUX_IPSR_GPSR(IP2_3_0, A16),
#define GPSR2_20 F_(AVB_TXCREFCLK, IP2_3_0)
FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
IP2_3_0 ))
PINMUX_IPSR_GPSR(IP2_3_0, AVB_TXCREFCLK),
IP2_3_0 ))
FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \
PINMUX_IPSR_GPSR(IP2_3_0, DU_DG1),
PINMUX_IPSR_GPSR(IP2_3_0, LCDOUT9),
PINMUX_IPSR_MSEL(IP2_3_0, MSIOF3_SYNC_B, SEL_MSIOF3_1),
#define GPSR1_9 F_(DU_DG1, IP2_3_0)