IP2SR1_7_4
#define GPSR1_17 F_(MSIOF1_SS2, IP2SR1_7_4)
IP2SR1_7_4
FM(IP0SR1_7_4) IP0SR1_7_4 FM(IP1SR1_7_4) IP1SR1_7_4 FM(IP2SR1_7_4) IP2SR1_7_4 FM(IP3SR1_7_4) IP3SR1_7_4 \
PINMUX_IPSR_GPSR(IP2SR1_7_4, MSIOF1_SS2),
PINMUX_IPSR_GPSR(IP2SR1_7_4, HTX3),
PINMUX_IPSR_GPSR(IP2SR1_7_4, TX3),
PINMUX_IPSR_GPSR(IP2SR1_7_4, DU_DG7),
PINMUX_IPSR_GPSR(IP2SR1_7_4, A17),
IP2SR1_7_4
FM(IP0SR1_7_4) IP0SR1_7_4 FM(IP1SR1_7_4) IP1SR1_7_4 FM(IP2SR1_7_4) IP2SR1_7_4 FM(IP3SR1_7_4) IP3SR1_7_4 \
PINMUX_IPSR_GPSR(IP2SR1_7_4, SCIF_CLK),
PINMUX_IPSR_GPSR(IP2SR1_7_4, IRQ4_A),
#define GPSR1_17 F_(SCIF_CLK, IP2SR1_7_4)
IP2SR1_7_4
FM(IP0SR1_7_4) IP0SR1_7_4 FM(IP1SR1_7_4) IP1SR1_7_4 FM(IP2SR1_7_4) IP2SR1_7_4 FM(IP3SR1_7_4) IP3SR1_7_4 \
PINMUX_IPSR_GPSR(IP2SR1_7_4, SCIF_CLK),
PINMUX_IPSR_GPSR(IP2SR1_7_4, IRQ4_A),
#define GPSR1_17 F_(SCIF_CLK, IP2SR1_7_4)