IP2SR1_15_12
#define GPSR1_19 F_(MSIOF2_TXD, IP2SR1_15_12)
IP2SR1_15_12
FM(IP0SR1_15_12) IP0SR1_15_12 FM(IP1SR1_15_12) IP1SR1_15_12 FM(IP2SR1_15_12) IP2SR1_15_12 FM(IP3SR1_15_12) IP3SR1_15_12 \
PINMUX_IPSR_GPSR(IP2SR1_15_12, MSIOF2_TXD),
PINMUX_IPSR_GPSR(IP2SR1_15_12, HCTS1_N),
PINMUX_IPSR_GPSR(IP2SR1_15_12, CTS1_N),
PINMUX_IPSR_GPSR(IP2SR1_15_12, DU_DB3),
PINMUX_IPSR_GPSR(IP2SR1_15_12, A19),
IP2SR1_15_12
FM(IP0SR1_15_12) IP0SR1_15_12 FM(IP1SR1_15_12) IP1SR1_15_12 FM(IP2SR1_15_12) IP2SR1_15_12 FM(IP3SR1_15_12) IP3SR1_15_12 \
PINMUX_IPSR_GPSR(IP2SR1_15_12, SSI_WS),
PINMUX_IPSR_GPSR(IP2SR1_15_12, TCLK4_B),
#define GPSR1_19 F_(SSI_WS, IP2SR1_15_12)
IP2SR1_15_12
FM(IP0SR1_15_12) IP0SR1_15_12 FM(IP1SR1_15_12) IP1SR1_15_12 FM(IP2SR1_15_12) IP2SR1_15_12 FM(IP3SR1_15_12) IP3SR1_15_12 \
PINMUX_IPSR_GPSR(IP2SR1_15_12, SSI_WS),
PINMUX_IPSR_GPSR(IP2SR1_15_12, TCLK4_B),
#define GPSR1_19 F_(SSI_WS, IP2SR1_15_12)