IP1SR5_15_12
PINMUX_IPSR_GPSR(IP1SR5_15_12, AVB1_TD3),
PINMUX_IPSR_GPSR(IP1SR5_15_12, AVB1_MII_TD3),
#define GPSR5_11 F_(AVB1_TD3, IP1SR5_15_12)
IP1SR5_15_12
FM(IP0SR5_15_12) IP0SR5_15_12 FM(IP1SR5_15_12) IP1SR5_15_12 FM(IP2SR5_15_12) IP2SR5_15_12 \
PINMUX_IPSR_GPSR(IP1SR5_15_12, AVB2_TD2),
#define GPSR5_11 F_(AVB2_TD2, IP1SR5_15_12)
IP1SR5_15_12
FM(IP0SR5_15_12) IP0SR5_15_12 FM(IP1SR5_15_12) IP1SR5_15_12 FM(IP2SR5_15_12) IP2SR5_15_12 \
PINMUX_IPSR_GPSR(IP1SR5_15_12, AVB2_TD2),
#define GPSR5_11 F_(AVB2_TD2, IP1SR5_15_12)
IP1SR5_15_12
FM(IP0SR5_15_12) IP0SR5_15_12 FM(IP1SR5_15_12) IP1SR5_15_12 FM(IP2SR5_15_12) IP2SR5_15_12 \