IP1SR4_15_12
PINMUX_IPSR_GPSR(IP1SR4_15_12, AVB0_TD3),
PINMUX_IPSR_GPSR(IP1SR4_15_12, AVB0_MII_TD3),
#define GPSR4_11 F_(AVB0_TD3, IP1SR4_15_12)
IP1SR4_15_12
FM(IP0SR4_15_12) IP0SR4_15_12 FM(IP1SR4_15_12) IP1SR4_15_12 FM(IP2SR4_15_12) IP2SR4_15_12 \
PINMUX_IPSR_GPSR(IP1SR4_15_12, TSN0_RXC),
#define GPSR4_11 F_(TSN0_RXC, IP1SR4_15_12)
IP1SR4_15_12
FM(IP0SR4_15_12) IP0SR4_15_12 FM(IP1SR4_15_12) IP1SR4_15_12 FM(IP2SR4_15_12) IP2SR4_15_12 \
#define GPSR4_11 F_(SCIF_CLK2, IP1SR4_15_12)
IP1SR4_15_12
FM(IP0SR4_15_12) IP0SR4_15_12 FM(IP1SR4_15_12) IP1SR4_15_12 \
PINMUX_IPSR_GPSR(IP1SR4_15_12, SCIF_CLK2),