IP1SR3_15_12
PINMUX_IPSR_GPSR(IP1SR3_15_12, CANFD5_TX),
PINMUX_IPSR_GPSR(IP1SR3_15_12, FXR_TXENA_N),
#define GPSR3_11 F_(CANFD5_TX, IP1SR3_15_12)
IP1SR3_15_12
FM(IP1SR3_15_12) IP1SR3_15_12 \
#define GPSR3_11 F_(SD_CD, IP1SR3_15_12)
IP1SR3_15_12
FM(IP0SR3_15_12) IP0SR3_15_12 FM(IP1SR3_15_12) IP1SR3_15_12 FM(IP2SR3_15_12) IP2SR3_15_12 FM(IP3SR3_15_12) IP3SR3_15_12 \
PINMUX_IPSR_GPSR(IP1SR3_15_12, SD_CD),
#define GPSR3_11 F_(SD_CD, IP1SR3_15_12)
IP1SR3_15_12
FM(IP0SR3_15_12) IP0SR3_15_12 FM(IP1SR3_15_12) IP1SR3_15_12 FM(IP2SR3_15_12) IP2SR3_15_12 FM(IP3SR3_15_12) IP3SR3_15_12 \
PINMUX_IPSR_GPSR(IP1SR3_15_12, SD_CD),