IP1SR2_7_4
#define GPSR2_9 F_(GP2_09, IP1SR2_7_4)
IP1SR2_7_4
FM(IP0SR2_7_4) IP0SR2_7_4 FM(IP1SR2_7_4) IP1SR2_7_4 FM(IP2SR2_7_4) IP2SR2_7_4 \
PINMUX_IPSR_MSEL(IP1SR2_7_4, GP2_09, SEL_I2C3_0),
PINMUX_IPSR_MSEL(IP1SR2_7_4, HTX2, SEL_I2C3_0),
PINMUX_IPSR_MSEL(IP1SR2_7_4, MSIOF4_SS2, SEL_I2C3_0),
PINMUX_IPSR_MSEL(IP1SR2_7_4, TX4, SEL_I2C3_0),
PINMUX_IPSR_MSEL(IP1SR2_7_4, D10, SEL_I2C3_0),
PINMUX_IPSR_PHYS(IP1SR2_7_4, SDA3, SEL_I2C3_3),
#define GPSR2_9 F_(CAN_CLK, IP1SR2_7_4)
IP1SR2_7_4
FM(IP0SR2_7_4) IP0SR2_7_4 FM(IP1SR2_7_4) IP1SR2_7_4 FM(IP2SR2_7_4) IP2SR2_7_4 \
PINMUX_IPSR_GPSR(IP1SR2_7_4, CAN_CLK),
PINMUX_IPSR_GPSR(IP1SR2_7_4, FXR_TXENA_N_B),
#define GPSR2_9 F_(CAN_CLK, IP1SR2_7_4)
IP1SR2_7_4
FM(IP0SR2_7_4) IP0SR2_7_4 FM(IP1SR2_7_4) IP1SR2_7_4 FM(IP2SR2_7_4) IP2SR2_7_4 \
PINMUX_IPSR_GPSR(IP1SR2_7_4, CAN_CLK),
PINMUX_IPSR_GPSR(IP1SR2_7_4, FXR_TXENA_N_B),