IP1SR1_27_24
#define GPSR1_14 F_(MSIOF1_SCK, IP1SR1_27_24)
IP1SR1_27_24
FM(IP0SR1_27_24) IP0SR1_27_24 FM(IP1SR1_27_24) IP1SR1_27_24 FM(IP2SR1_27_24) IP2SR1_27_24 FM(IP3SR1_27_24) IP3SR1_27_24 \
PINMUX_IPSR_GPSR(IP1SR1_27_24, MSIOF1_SCK),
PINMUX_IPSR_GPSR(IP1SR1_27_24, HSCK3),
PINMUX_IPSR_GPSR(IP1SR1_27_24, CTS3_N),
PINMUX_IPSR_GPSR(IP1SR1_27_24, DU_DG4),
PINMUX_IPSR_GPSR(IP1SR1_27_24, A14),
IP1SR1_27_24
FM(IP0SR1_27_24) IP0SR1_27_24 FM(IP1SR1_27_24) IP1SR1_27_24 FM(IP2SR1_27_24) IP2SR1_27_24 \
PINMUX_IPSR_GPSR(IP1SR1_27_24, HRTS0_N),
PINMUX_IPSR_GPSR(IP1SR1_27_24, RTS0_N),
PINMUX_IPSR_GPSR(IP1SR1_27_24, PWM9),
#define GPSR1_14 F_(HRTS0_N, IP1SR1_27_24)
#define GPSR1_14 F_(HRTS0_N, IP1SR1_27_24)
IP1SR1_27_24
FM(IP0SR1_27_24) IP0SR1_27_24 FM(IP1SR1_27_24) IP1SR1_27_24 FM(IP2SR1_27_24) IP2SR1_27_24 \
PINMUX_IPSR_GPSR(IP1SR1_27_24, HRTS0_N),
PINMUX_IPSR_GPSR(IP1SR1_27_24, RTS0_N),
PINMUX_IPSR_GPSR(IP1SR1_27_24, PWM0_B),