IP1SR1_15_12
#define GPSR1_11 F_(MSIOF0_SS2, IP1SR1_15_12)
IP1SR1_15_12
FM(IP0SR1_15_12) IP0SR1_15_12 FM(IP1SR1_15_12) IP1SR1_15_12 FM(IP2SR1_15_12) IP2SR1_15_12 FM(IP3SR1_15_12) IP3SR1_15_12 \
PINMUX_IPSR_GPSR(IP1SR1_15_12, MSIOF0_SS2),
PINMUX_IPSR_GPSR(IP1SR1_15_12, DU_DR7),
PINMUX_IPSR_GPSR(IP1SR1_15_12, A11),
IP1SR1_15_12
FM(IP0SR1_15_12) IP0SR1_15_12 FM(IP1SR1_15_12) IP1SR1_15_12 FM(IP2SR1_15_12) IP2SR1_15_12 FM(IP3SR1_15_12) IP3SR1_15_12 \
PINMUX_IPSR_GPSR(IP1SR1_15_12, MSIOF0_RXD),
#define GPSR1_11 F_(MSIOF0_RXD, IP1SR1_15_12)
#define GPSR1_11 F_(MSIOF0_RXD, IP1SR1_15_12)
IP1SR1_15_12
FM(IP0SR1_15_12) IP0SR1_15_12 FM(IP1SR1_15_12) IP1SR1_15_12 FM(IP2SR1_15_12) IP2SR1_15_12 FM(IP3SR1_15_12) IP3SR1_15_12 \
PINMUX_IPSR_GPSR(IP1SR1_15_12, MSIOF0_RXD),