IP0SR5_27_24
PINMUX_IPSR_GPSR(IP0SR5_27_24, AVB1_TX_CTL),
PINMUX_IPSR_GPSR(IP0SR5_27_24, AVB1_MII_TX_EN),
#define GPSR5_6 F_(AVB1_TX_CTL, IP0SR5_27_24)
IP0SR5_27_24
FM(IP0SR5_27_24) IP0SR5_27_24 FM(IP1SR5_27_24) IP1SR5_27_24 \
PINMUX_IPSR_GPSR(IP0SR5_27_24, AVB2_MDC),
#define GPSR5_6 F_(AVB2_MDC, IP0SR5_27_24)
IP0SR5_27_24
FM(IP0SR5_27_24) IP0SR5_27_24 FM(IP1SR5_27_24) IP1SR5_27_24 \
PINMUX_IPSR_GPSR(IP0SR5_27_24, AVB2_MDC),
#define GPSR5_6 F_(AVB2_MDC, IP0SR5_27_24)
IP0SR5_27_24
FM(IP0SR5_27_24) IP0SR5_27_24 FM(IP1SR5_27_24) IP1SR5_27_24 \