IP0SR4_31_28
PINMUX_IPSR_GPSR(IP0SR4_31_28, AVB0_TXC),
PINMUX_IPSR_GPSR(IP0SR4_31_28, AVB0_MII_TXC),
#define GPSR4_7 F_(AVB0_TXC, IP0SR4_31_28)
IP0SR4_31_28
FM(IP0SR4_31_28) IP0SR4_31_28 FM(IP1SR4_31_28) IP1SR4_31_28 \
PINMUX_IPSR_GPSR(IP0SR4_31_28, TSN0_RX_CTL),
#define GPSR4_7 F_(TSN0_RX_CTL, IP0SR4_31_28)
IP0SR4_31_28
FM(IP0SR4_31_28) IP0SR4_31_28 FM(IP1SR4_31_28) IP1SR4_31_28 FM(IP2SR4_31_28) IP2SR4_31_28 \
#define GPSR4_7 F_(SDA3, IP0SR4_31_28)
IP0SR4_31_28
FM(IP0SR4_31_28) IP0SR4_31_28 FM(IP1SR4_31_28) IP1SR4_31_28 FM(IP2SR4_31_28) IP2SR4_31_28 \
PINMUX_IPSR_MSEL(IP0SR4_31_28, SDA3, SEL_SDA3_0),