IP0SR3_31_28
PINMUX_IPSR_GPSR(IP0SR3_31_28, CANFD3_TX),
PINMUX_IPSR_GPSR(IP0SR3_31_28, PWM2),
#define GPSR3_7 F_(CANFD3_TX, IP0SR3_31_28)
IP0SR3_31_28
FM(IP0SR3_31_28) IP0SR3_31_28 \
#define GPSR3_7 F_(MMC_D4, IP0SR3_31_28)
IP0SR3_31_28
FM(IP0SR3_31_28) IP0SR3_31_28 FM(IP1SR3_31_28) IP1SR3_31_28 FM(IP2SR3_31_28) IP2SR3_31_28 \
PINMUX_IPSR_GPSR(IP0SR3_31_28, MMC_D4),
#define GPSR3_7 F_(MMC_D4, IP0SR3_31_28)
IP0SR3_31_28
FM(IP0SR3_31_28) IP0SR3_31_28 FM(IP1SR3_31_28) IP1SR3_31_28 FM(IP2SR3_31_28) IP2SR3_31_28 FM(IP3SR3_31_28) IP3SR3_31_28 \
PINMUX_IPSR_GPSR(IP0SR3_31_28, MMC_D4),