IP0SR3_27_24
PINMUX_IPSR_GPSR(IP0SR3_27_24, CANFD2_RX),
PINMUX_IPSR_GPSR(IP0SR3_27_24, TPU0TO3),
PINMUX_IPSR_GPSR(IP0SR3_27_24, PWM1),
#define GPSR3_6 F_(CANFD2_RX, IP0SR3_27_24)
IP0SR3_27_24
FM(IP0SR3_27_24) IP0SR3_27_24 \
#define GPSR3_6 F_(MMC_D5, IP0SR3_27_24)
IP0SR3_27_24
FM(IP0SR3_27_24) IP0SR3_27_24 FM(IP1SR3_27_24) IP1SR3_27_24 FM(IP2SR3_27_24) IP2SR3_27_24 \
PINMUX_IPSR_GPSR(IP0SR3_27_24, MMC_D5),
#define GPSR3_6 F_(MMC_D5, IP0SR3_27_24)
IP0SR3_27_24
FM(IP0SR3_27_24) IP0SR3_27_24 FM(IP1SR3_27_24) IP1SR3_27_24 FM(IP2SR3_27_24) IP2SR3_27_24 FM(IP3SR3_27_24) IP3SR3_27_24 \
PINMUX_IPSR_GPSR(IP0SR3_27_24, MMC_D5),