IP0SR2_23_20
#define GPSR2_5 F_(GP2_05, IP0SR2_23_20)
IP0SR2_23_20
FM(IP0SR2_23_20) IP0SR2_23_20 FM(IP1SR2_23_20) IP1SR2_23_20 FM(IP2SR2_23_20) IP2SR2_23_20 \
PINMUX_IPSR_MSEL(IP0SR2_23_20, GP2_05, SEL_I2C1_0),
PINMUX_IPSR_MSEL(IP0SR2_23_20, HSCK2, SEL_I2C1_0),
PINMUX_IPSR_MSEL(IP0SR2_23_20, MSIOF4_TXD, SEL_I2C1_0),
PINMUX_IPSR_MSEL(IP0SR2_23_20, SCK4, SEL_I2C1_0),
PINMUX_IPSR_MSEL(IP0SR2_23_20, D6, SEL_I2C1_0),
PINMUX_IPSR_PHYS(IP0SR2_23_20, SDA1, SEL_I2C1_3),
#define GPSR2_5 F_(FXR_TXENB_N_A, IP0SR2_23_20)
IP0SR2_23_20
FM(IP0SR2_23_20) IP0SR2_23_20 FM(IP1SR2_23_20) IP1SR2_23_20 \
PINMUX_IPSR_GPSR(IP0SR2_23_20, FXR_TXENB_N_A),
#define GPSR2_5 F_(FXR_TXENB_N_A, IP0SR2_23_20)
IP0SR2_23_20
FM(IP0SR2_23_20) IP0SR2_23_20 FM(IP1SR2_23_20) IP1SR2_23_20 \
PINMUX_IPSR_GPSR(IP0SR2_23_20, FXR_TXENB_N_A),