IP0SR1_31_28
#define GPSR1_7 F_(MSIOF0_TXD, IP0SR1_31_28)
IP0SR1_31_28
FM(IP0SR1_31_28) IP0SR1_31_28 FM(IP1SR1_31_28) IP1SR1_31_28 FM(IP2SR1_31_28) IP2SR1_31_28 \
PINMUX_IPSR_GPSR(IP0SR1_31_28, MSIOF0_TXD),
PINMUX_IPSR_GPSR(IP0SR1_31_28, DU_DR3),
PINMUX_IPSR_GPSR(IP0SR1_31_28, A7),
IP0SR1_31_28
FM(IP0SR1_31_28) IP0SR1_31_28
PINMUX_IPSR_MSEL(IP0SR1_31_28, GP1_07, SEL_I2C3_0),
PINMUX_IPSR_MSEL(IP0SR1_31_28, MSIOF2_TXD, SEL_I2C3_0),
PINMUX_IPSR_MSEL(IP0SR1_31_28, TX4, SEL_I2C3_0),
PINMUX_IPSR_PHYS(IP0SR1_31_28, SDA3, SEL_I2C3_3),
#define GPSR1_7 F_(GP1_07, IP0SR1_31_28)
#define GPSR1_7 F_(MSIOF0_SS1, IP0SR1_31_28)
IP0SR1_31_28
FM(IP0SR1_31_28) IP0SR1_31_28 FM(IP1SR1_31_28) IP1SR1_31_28 FM(IP2SR1_31_28) IP2SR1_31_28 \
PINMUX_IPSR_GPSR(IP0SR1_31_28, MSIOF0_SS1),
PINMUX_IPSR_GPSR(IP0SR1_31_28, HRX1_B),
PINMUX_IPSR_GPSR(IP0SR1_31_28, RX1_B),
#define GPSR1_7 F_(MSIOF0_SS1, IP0SR1_31_28)
IP0SR1_31_28
FM(IP0SR1_31_28) IP0SR1_31_28 FM(IP1SR1_31_28) IP1SR1_31_28 FM(IP2SR1_31_28) IP2SR1_31_28 \
PINMUX_IPSR_GPSR(IP0SR1_31_28, MSIOF0_SS1),
PINMUX_IPSR_GPSR(IP0SR1_31_28, HRX1_B),
PINMUX_IPSR_GPSR(IP0SR1_31_28, RX1_B),