IP0SR1_27_24
#define GPSR1_6 F_(MSIOF0_RXD, IP0SR1_27_24)
IP0SR1_27_24
FM(IP0SR1_27_24) IP0SR1_27_24 FM(IP1SR1_27_24) IP1SR1_27_24 FM(IP2SR1_27_24) IP2SR1_27_24 FM(IP3SR1_27_24) IP3SR1_27_24 \
PINMUX_IPSR_GPSR(IP0SR1_27_24, MSIOF0_RXD),
PINMUX_IPSR_GPSR(IP0SR1_27_24, DU_DR2),
PINMUX_IPSR_GPSR(IP0SR1_27_24, A6),
IP0SR1_27_24
FM(IP0SR1_27_24) IP0SR1_27_24 \
PINMUX_IPSR_MSEL(IP0SR1_27_24, GP1_06, SEL_I2C3_0),
PINMUX_IPSR_MSEL(IP0SR1_27_24, MSIOF2_RXD, SEL_I2C3_0),
PINMUX_IPSR_MSEL(IP0SR1_27_24, RX4, SEL_I2C3_0),
PINMUX_IPSR_PHYS(IP0SR1_27_24, SCL3, SEL_I2C3_3),
#define GPSR1_6 F_(GP1_06, IP0SR1_27_24)
#define GPSR1_6 F_(MSIOF0_SS2, IP0SR1_27_24)
IP0SR1_27_24
FM(IP0SR1_27_24) IP0SR1_27_24 FM(IP1SR1_27_24) IP1SR1_27_24 FM(IP2SR1_27_24) IP2SR1_27_24 \
PINMUX_IPSR_GPSR(IP0SR1_27_24, MSIOF0_SS2),
PINMUX_IPSR_GPSR(IP0SR1_27_24, HTX1_B),
PINMUX_IPSR_GPSR(IP0SR1_27_24, TX1_B),
#define GPSR1_6 F_(MSIOF0_SS2, IP0SR1_27_24)
IP0SR1_27_24
FM(IP0SR1_27_24) IP0SR1_27_24 FM(IP1SR1_27_24) IP1SR1_27_24 FM(IP2SR1_27_24) IP2SR1_27_24 \
PINMUX_IPSR_GPSR(IP0SR1_27_24, MSIOF0_SS2),
PINMUX_IPSR_GPSR(IP0SR1_27_24, HTX1_B),
PINMUX_IPSR_GPSR(IP0SR1_27_24, TX1_B),