IP0SR0_31_28
IP0SR0_31_28
FM(IP0SR0_31_28) IP0SR0_31_28 FM(IP1SR0_31_28) IP1SR0_31_28 \
PINMUX_IPSR_GPSR(IP0SR0_31_28, TX0),
PINMUX_IPSR_GPSR(IP0SR0_31_28, HTX1),
PINMUX_IPSR_GPSR(IP0SR0_31_28, MSIOF1_TXD),
PINMUX_IPSR_GPSR(IP0SR0_31_28, TSN1_AVTP_CAPTURE_A),
#define GPSR0_7 F_(TX0, IP0SR0_31_28)
IP0SR0_31_28
FM(IP0SR0_31_28) IP0SR0_31_28 FM(IP1SR0_31_28) IP1SR0_31_28 \
#define GPSR0_7 F_(MSIOF5_SS2, IP0SR0_31_28)
PINMUX_IPSR_GPSR(IP0SR0_31_28, MSIOF5_SS2),
IP0SR0_31_28
FM(IP0SR0_31_28) IP0SR0_31_28 FM(IP1SR0_31_28) IP1SR0_31_28 \
PINMUX_IPSR_GPSR(IP0SR0_31_28, MSIOF5_SS2),
#define GPSR0_7 F_(MSIOF5_SS2, IP0SR0_31_28)