Symbol: IOASIC_SLOT_SIZE
arch/mips/dec/prom/identify.c
107
dec_kn_slot_size = IOASIC_SLOT_SIZE;
arch/mips/dec/prom/identify.c
97
dec_kn_slot_size = IOASIC_SLOT_SIZE;
arch/mips/include/asm/dec/ioasic_addrs.h
26
#define IOASIC_SYS_ROM (0*IOASIC_SLOT_SIZE) /* system board ROM */
arch/mips/include/asm/dec/ioasic_addrs.h
27
#define IOASIC_IOCTL (1*IOASIC_SLOT_SIZE) /* I/O ASIC */
arch/mips/include/asm/dec/ioasic_addrs.h
28
#define IOASIC_ESAR (2*IOASIC_SLOT_SIZE) /* LANCE MAC address chip */
arch/mips/include/asm/dec/ioasic_addrs.h
29
#define IOASIC_LANCE (3*IOASIC_SLOT_SIZE) /* LANCE Ethernet */
arch/mips/include/asm/dec/ioasic_addrs.h
30
#define IOASIC_SCC0 (4*IOASIC_SLOT_SIZE) /* SCC #0 */
arch/mips/include/asm/dec/ioasic_addrs.h
31
#define IOASIC_VDAC_HI (5*IOASIC_SLOT_SIZE) /* VDAC (maxine) */
arch/mips/include/asm/dec/ioasic_addrs.h
32
#define IOASIC_SCC1 (6*IOASIC_SLOT_SIZE) /* SCC #1 (3min, 3max+) */
arch/mips/include/asm/dec/ioasic_addrs.h
33
#define IOASIC_VDAC_LO (7*IOASIC_SLOT_SIZE) /* VDAC (maxine) */
arch/mips/include/asm/dec/ioasic_addrs.h
34
#define IOASIC_TOY (8*IOASIC_SLOT_SIZE) /* RTC */
arch/mips/include/asm/dec/ioasic_addrs.h
35
#define IOASIC_ISDN (9*IOASIC_SLOT_SIZE) /* ISDN (maxine) */
arch/mips/include/asm/dec/ioasic_addrs.h
36
#define IOASIC_ERRADDR (9*IOASIC_SLOT_SIZE) /* bus error address (3max+) */
arch/mips/include/asm/dec/ioasic_addrs.h
37
#define IOASIC_CHKSYN (10*IOASIC_SLOT_SIZE) /* ECC syndrome (3max+) */
arch/mips/include/asm/dec/ioasic_addrs.h
38
#define IOASIC_ACC_BUS (10*IOASIC_SLOT_SIZE) /* ACCESS.bus (maxine) */
arch/mips/include/asm/dec/ioasic_addrs.h
39
#define IOASIC_MCR (11*IOASIC_SLOT_SIZE) /* memory control (3max+) */
arch/mips/include/asm/dec/ioasic_addrs.h
40
#define IOASIC_FLOPPY (11*IOASIC_SLOT_SIZE) /* FDC (maxine) */
arch/mips/include/asm/dec/ioasic_addrs.h
41
#define IOASIC_SCSI (12*IOASIC_SLOT_SIZE) /* ASC SCSI */
arch/mips/include/asm/dec/ioasic_addrs.h
42
#define IOASIC_FDC_DMA (13*IOASIC_SLOT_SIZE) /* FDC DMA (maxine) */
arch/mips/include/asm/dec/ioasic_addrs.h
43
#define IOASIC_SCSI_DMA (14*IOASIC_SLOT_SIZE) /* ??? */
arch/mips/include/asm/dec/ioasic_addrs.h
44
#define IOASIC_RES_15 (15*IOASIC_SLOT_SIZE) /* unused? */
arch/mips/include/asm/dec/kn05.h
30
#define KN4K_MB_ROM (0*IOASIC_SLOT_SIZE) /* KN05/KN04 card ROM */
arch/mips/include/asm/dec/kn05.h
31
#define KN4K_IOCTL (1*IOASIC_SLOT_SIZE) /* I/O ASIC */
arch/mips/include/asm/dec/kn05.h
32
#define KN4K_ESAR (2*IOASIC_SLOT_SIZE) /* LANCE MAC address chip */
arch/mips/include/asm/dec/kn05.h
33
#define KN4K_LANCE (3*IOASIC_SLOT_SIZE) /* LANCE Ethernet */
arch/mips/include/asm/dec/kn05.h
34
#define KN4K_MB_INT (4*IOASIC_SLOT_SIZE) /* MB interrupt register */
arch/mips/include/asm/dec/kn05.h
35
#define KN4K_MB_EA (5*IOASIC_SLOT_SIZE) /* MB error address? */
arch/mips/include/asm/dec/kn05.h
36
#define KN4K_MB_EC (6*IOASIC_SLOT_SIZE) /* MB error ??? */
arch/mips/include/asm/dec/kn05.h
37
#define KN4K_MB_CSR (7*IOASIC_SLOT_SIZE) /* MB control & status */
arch/mips/include/asm/dec/kn05.h
38
#define KN4K_RES_08 (8*IOASIC_SLOT_SIZE) /* unused? */
arch/mips/include/asm/dec/kn05.h
39
#define KN4K_RES_09 (9*IOASIC_SLOT_SIZE) /* unused? */
arch/mips/include/asm/dec/kn05.h
40
#define KN4K_RES_10 (10*IOASIC_SLOT_SIZE) /* unused? */
arch/mips/include/asm/dec/kn05.h
41
#define KN4K_RES_11 (11*IOASIC_SLOT_SIZE) /* unused? */
arch/mips/include/asm/dec/kn05.h
42
#define KN4K_SCSI (12*IOASIC_SLOT_SIZE) /* ASC SCSI */
arch/mips/include/asm/dec/kn05.h
43
#define KN4K_RES_13 (13*IOASIC_SLOT_SIZE) /* unused? */
arch/mips/include/asm/dec/kn05.h
44
#define KN4K_RES_14 (14*IOASIC_SLOT_SIZE) /* unused? */
arch/mips/include/asm/dec/kn05.h
45
#define KN4K_RES_15 (15*IOASIC_SLOT_SIZE) /* unused? */