AR5K_REG_ENABLE_BITS
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR,
AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, AR5K_PCICFG_RETRY_FIX);
AR5K_REG_ENABLE_BITS(ah, AR5K_MISC_MODE,
AR5K_REG_ENABLE_BITS(ah, AR5K_STA_ID1,
AR5K_REG_ENABLE_BITS(ah, AR5K_BEACON, AR5K_BEACON_ENABLE);
AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue),
AR5K_REG_ENABLE_BITS(ah, AR5K_DIAG_SW_5211,
AR5K_REG_ENABLE_BITS(ah, AR5K_PIMR, AR5K_IMR_GPIO);
AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, led);
AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, led_5210);
AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, AR5K_PCICFG_EEAE);
AR5K_REG_ENABLE_BITS(ah, AR5K_EEPROM_CMD,
AR5K_REG_ENABLE_BITS(ah, AR5K_STA_ID1, val);
AR5K_REG_ENABLE_BITS(ah, AR5K_RXCFG, AR5K_RXCFG_ZLFDMA);
AR5K_REG_ENABLE_BITS(ah, AR5K_TXCFG, AR5K_TXCFG_ADHOC_BCN_ATIM);
AR5K_REG_ENABLE_BITS(ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX);
AR5K_REG_ENABLE_BITS(ah, AR5K_CFG, AR5K_CFG_IBSS);
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_CCKTXCTL,
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_CCKTXCTL,
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
AR5K_REG_ENABLE_BITS(ah, AR5K_DIAG_SW_5210,
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGC, AR5K_PHY_AGC_DISABLE);
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGC, AR5K_PHY_AGC_DISABLE);
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, AR5K_PHY_AGCCTL_CAL);
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_ENABLE);
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_RUN);
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ,
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_FAST_ANT_DIV,
AR5K_REG_ENABLE_BITS(ah, AR5K_STA_ID1, sta_id1);
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_RFBUS_REQ,
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
AR5K_REG_ENABLE_BITS(ah, AR5K_TXCFG,
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ,
AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_DFS_MISC(queue),
AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_DFS_MISC(queue),
AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue),
AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue),
AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue),
AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue),
AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_DFS_MISC(queue),
AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue),
AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_DFS_MISC(queue),
AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue),
AR5K_REG_ENABLE_BITS(ah, AR5K_SIMR2,
AR5K_REG_ENABLE_BITS(ah, AR5K_DCU_GBL_IFS_MISC,
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_ENABLE);
AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, s_led[0]);
AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG,
AR5K_REG_ENABLE_BITS(ah, AR5K_DIAG_SW_5211,