AR5K_REG_DISABLE_BITS
AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR,
AR5K_REG_DISABLE_BITS(ah, AR5K_STA_ID1,
AR5K_REG_DISABLE_BITS(ah, AR5K_BEACON, AR5K_BEACON_ENABLE);
AR5K_REG_DISABLE_BITS(ah, AR5K_QUIET_CTL1,
AR5K_REG_DISABLE_BITS(ah, AR5K_DIAG_SW_5211,
AR5K_REG_DISABLE_BITS(ah, AR5K_QUEUE_MISC(queue),
AR5K_REG_DISABLE_BITS(ah, AR5K_PCICFG,
AR5K_REG_DISABLE_BITS(ah, AR5K_PCICFG, AR5K_PCICFG_LED);
AR5K_REG_DISABLE_BITS(ah, AR5K_STA_ID1, val);
AR5K_REG_DISABLE_BITS(ah, AR5K_RXCFG, AR5K_RXCFG_ZLFDMA);
AR5K_REG_DISABLE_BITS(ah, AR5K_STA_ID1, AR5K_STA_ID1_PCF);
AR5K_REG_DISABLE_BITS(ah, AR5K_STA_ID1, AR5K_STA_ID1_PWR_SV);
AR5K_REG_DISABLE_BITS(ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX);
AR5K_REG_DISABLE_BITS(ah, AR5K_CFG, AR5K_CFG_IBSS);
AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_AGC, AR5K_PHY_AGC_DISABLE);
AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_AGC, AR5K_PHY_AGC_DISABLE);
AR5K_REG_DISABLE_BITS(ah, AR5K_DIAG_SW_5210,
AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_IQ,
AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_AGCCTL,
AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_FAST_ANT_DIV,
AR5K_REG_DISABLE_BITS(ah, AR5K_STA_ID1, AR5K_STA_ID1_ANTENNA_SETTINGS);
AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_RFBUS_REQ,
AR5K_REG_DISABLE_BITS(ah, AR5K_TXCFG,
AR5K_REG_DISABLE_BITS(ah, AR5K_SIMR2, AR5K_SIMR2_QCU_TXURN);
AR5K_REG_DISABLE_BITS(ah, AR5K_BEACON, AR5K_BEACON_ENABLE);
AR5K_REG_DISABLE_BITS(ah, AR5K_PCICFG,
AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_DAG_CCK_CTL,
AR5K_REG_DISABLE_BITS(ah, AR5K_TXCFG,