drivers/firmware/tegra/ivc.c

234

*map = IOSYS_MAP_INIT_OFFSET(header, offset);

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

1064

return IOSYS_MAP_INIT_OFFSET(&guc->ads_map, offset);

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

553

info_map = IOSYS_MAP_INIT_OFFSET(&guc->ads_map,

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

719

info_map = IOSYS_MAP_INIT_OFFSET(&guc->ads_map,

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

889

struct iosys_map info_map = IOSYS_MAP_INIT_OFFSET(&guc->ads_map,

drivers/gpu/drm/tiny/cirrus-qemu.c

356

struct iosys_map dst = IOSYS_MAP_INIT_OFFSET(&vaddr, offset);

drivers/gpu/drm/xe/xe_gsc_proxy.c

430

gsc->proxy.to_gsc = IOSYS_MAP_INIT_OFFSET(&bo->vmap, 0);

drivers/gpu/drm/xe/xe_gsc_proxy.c

431

gsc->proxy.from_gsc = IOSYS_MAP_INIT_OFFSET(&bo->vmap, GSC_PROXY_BUFFER_SIZE);

drivers/gpu/drm/xe/xe_guc_ads.c

487

struct iosys_map info_map = IOSYS_MAP_INIT_OFFSET(ads_to_map(ads),

drivers/gpu/drm/xe/xe_guc_ads.c

625

info_map = IOSYS_MAP_INIT_OFFSET(ads_to_map(ads),

drivers/gpu/drm/xe/xe_guc_ads.c

783

struct iosys_map regset_map = IOSYS_MAP_INIT_OFFSET(ads_to_map(ads),

drivers/gpu/drm/xe/xe_guc_ads.c

870

struct iosys_map info_map = IOSYS_MAP_INIT_OFFSET(ads_to_map(ads),

drivers/gpu/drm/xe/xe_guc_ads.c

894

struct iosys_map info_map = IOSYS_MAP_INIT_OFFSET(ads_to_map(ads),

drivers/gpu/drm/xe/xe_guc_ads.c

933

struct iosys_map info_map = IOSYS_MAP_INIT_OFFSET(ads_to_map(ads),

drivers/gpu/drm/xe/xe_guc_ct.c

424

h2g->cmds = IOSYS_MAP_INIT_OFFSET(map, CTB_H2G_BUFFER_OFFSET);

drivers/gpu/drm/xe/xe_guc_ct.c

439

g2h->desc = IOSYS_MAP_INIT_OFFSET(map, CTB_DESC_SIZE);

drivers/gpu/drm/xe/xe_guc_ct.c

442

g2h->cmds = IOSYS_MAP_INIT_OFFSET(map, CTB_H2G_BUFFER_OFFSET +

drivers/gpu/drm/xe/xe_guc_ct.c

923

struct iosys_map map = IOSYS_MAP_INIT_OFFSET(&h2g->cmds,

drivers/gpu/drm/xe/xe_guc_engine_activity.c

44

return IOSYS_MAP_INIT_OFFSET(&buffer->activity_bo->vmap, offset);

drivers/gpu/drm/xe/xe_guc_engine_activity.c

62

return IOSYS_MAP_INIT_OFFSET(&buffer->metadata_bo->vmap, offset);

drivers/gpu/drm/xe/xe_memirq.c

194

memirq->source = IOSYS_MAP_INIT_OFFSET(&bo->vmap, XE_MEMIRQ_SOURCE_OFFSET(0));

drivers/gpu/drm/xe/xe_memirq.c

195

memirq->status = IOSYS_MAP_INIT_OFFSET(&bo->vmap, XE_MEMIRQ_STATUS_OFFSET(0));

drivers/gpu/drm/xe/xe_memirq.c

196

memirq->mask = IOSYS_MAP_INIT_OFFSET(&bo->vmap, XE_MEMIRQ_ENABLE_OFFSET);

drivers/gpu/drm/xe/xe_memirq.c

472

struct iosys_map src_offset = IOSYS_MAP_INIT_OFFSET(&memirq->bo->vmap,

drivers/gpu/drm/xe/xe_memirq.c

477

IOSYS_MAP_INIT_OFFSET(&memirq->bo->vmap,

drivers/gpu/drm/xe/xe_memirq.c

494

struct iosys_map map = IOSYS_MAP_INIT_OFFSET(&memirq->status, offset * SZ_16);

drivers/gpu/drm/xe/xe_memirq.c

534

map = IOSYS_MAP_INIT_OFFSET(&memirq->status, ilog2(INTR_GUC) * SZ_16);

drivers/gpu/drm/xe/xe_memirq.c

542

map = IOSYS_MAP_INIT_OFFSET(&memirq->status, ilog2(INTR_MGUC) * SZ_16);

drivers/gpu/drm/xe/xe_pxp_submit.c

157

gsc_res->batch = IOSYS_MAP_INIT_OFFSET(&bo->vmap, 0);

drivers/gpu/drm/xe/xe_pxp_submit.c

158

gsc_res->msg_in = IOSYS_MAP_INIT_OFFSET(&bo->vmap, PXP_BB_SIZE);

drivers/gpu/drm/xe/xe_pxp_submit.c

159

gsc_res->msg_out = IOSYS_MAP_INIT_OFFSET(&bo->vmap, PXP_BB_SIZE + inout_size);