AR5K_PHY_TPC_RG5
{ AR5K_PHY_TPC_RG5, 0x0c30c16a },
{ AR5K_PHY_TPC_RG5, 0x0c30c166 },
AR5K_REG_WRITE_BITS(ah, AR5K_PHY_TPC_RG5,
{ AR5K_PHY_TPC_RG5, 0x0c30c16a },
pd_gain_overlap = (u8) ath5k_hw_reg_read(ah, AR5K_PHY_TPC_RG5) &
AR5K_PHY_TPC_RG5);