INT_MASK
int_status &= INT_MASK;
val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 1);
val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 0);
val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 1);
val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 0);
val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 1);
val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 0);
val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 1);
val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 1);
val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 0);
val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 0);
val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 1);
val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 1);
val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 0);
val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT_CTRL, INT_MASK, 0);
WREG32(INT_MASK + crtc_offsets[i], 0);
rdev, INT_MASK + crtc_offsets[i],
WREG32(INT_MASK + crtc_offsets[i], 0);
rdev, INT_MASK + crtc_offsets[i], VBLANK_INT_MASK,
error = i2c_smbus_write_byte_data(client, INT_MASK,
error = i2c_smbus_write_byte_data(client, INT_MASK,
error2 = i2c_smbus_write_byte_data(client, INT_MASK, INT_ALL);
error = i2c_smbus_write_byte_data(client, INT_MASK, INT_ALL);
i2c_smbus_write_byte_data(client, INT_MASK,
error = i2c_smbus_write_byte_data(client, INT_MASK,
error2 = i2c_smbus_write_byte_data(client, INT_MASK, INT_ALL);
irq_status &= INT_MASK;
msm_host_writel(msm_host, INT_MASK, host,
writel_relaxed(INT_MASK, ctrl->regs + IER);
u32 imask = ethoc_read(dev, INT_MASK);
ethoc_write(dev, INT_MASK, imask);
u32 imask = ethoc_read(dev, INT_MASK);
ethoc_write(dev, INT_MASK, imask);
mask = ethoc_read(priv, INT_MASK);
wrlp(mp, INT_MASK, 0);
wrlp(mp, INT_MASK, mp->int_mask);
wrlp(mp, INT_MASK, mp->int_mask);
wrlp(mp, INT_MASK, 0x00000000);
rdlp(mp, INT_MASK);
wrlp(mp, INT_MASK, 0x00000000);
rdlp(mp, INT_MASK);
wrlp(mp, INT_MASK, mp->int_mask);
wrlp(mp, INT_MASK, 0);
rdlp(mp, INT_MASK);
wrl(pep, INT_MASK, 0);
wrl(pep, INT_MASK, ALL_INTS);
wrl(pep, INT_MASK, ALL_INTS);
wrl(pep, INT_MASK, 0);
wrl(pep, INT_MASK, 0);
wrl(pep, INT_MASK, 0);
iowrite16(INT_MASK, ioaddr + MIER);
mask = inb( ioaddr + INT_MASK );
outb( 0, ioaddr + INT_MASK );
outb( mask, ioaddr + INT_MASK );
outb( 0, ioaddr + INT_MASK );
outb( SMC_INTERRUPT_MASK, ioaddr + INT_MASK );
outb( 0, ioaddr + INT_MASK );
outb( IM_ALLOC_INT, ioaddr + INT_MASK );
outb( 0, ioaddr + INT_MASK );
mask = inb( ioaddr + INT_MASK );\
outb( mask, ioaddr + INT_MASK ); \
mask = inb( ioaddr + INT_MASK );\
outb( mask, ioaddr + INT_MASK ); \
rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
__le16 INT_MASK;
writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
writel(0x0L, ctrl->hpc_reg + INT_MASK);
writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
writel(0, ctrl->hpc_reg + INT_MASK);
BQ24190_SYSFS_FIELD_RO(int_mask, MOC, INT_MASK),
ret |= anx7411_reg_write(ctx->spi_client, INT_MASK, 0);
if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);