INTRL2_CPU_CLEAR
intrl2_0_writel(priv, P_IRQ_MASK(P0_IRQ_OFF), INTRL2_CPU_CLEAR);
intrl2_1_writel(priv, P_IRQ_MASK(off), INTRL2_CPU_CLEAR);
intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
intrl2_1_writel(priv, priv->irq1_stat, INTRL2_CPU_CLEAR);
intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR);
intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR);
INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR);
bcmgenet_intrl2_1_writel(priv, (1 << ring->index), INTRL2_CPU_CLEAR);
bcmgenet_intrl2_1_writel(priv, mask, INTRL2_CPU_CLEAR);
bcmgenet_intrl2_0_writel(priv, 0xFFFFFFFF, INTRL2_CPU_CLEAR);
bcmgenet_intrl2_1_writel(priv, 0xFFFFFFFF, INTRL2_CPU_CLEAR);
bcmgenet_intrl2_1_writel(priv, status, INTRL2_CPU_CLEAR);
bcmgenet_intrl2_0_writel(priv, status, INTRL2_CPU_CLEAR);
bcmgenet_intrl2_0_writel(priv, 0xFFFFFFFF, INTRL2_CPU_CLEAR);