arch/x86/events/core.c

1257

case INTEL_PMC_IDX_METRIC_BASE ... INTEL_PMC_IDX_METRIC_END:

arch/x86/events/intel/core.c

2829

case INTEL_PMC_IDX_METRIC_BASE ... INTEL_PMC_IDX_METRIC_END:

arch/x86/events/intel/core.c

2917

val = (metric >> ((idx - INTEL_PMC_IDX_METRIC_BASE) * 8)) & 0xff;

arch/x86/events/intel/core.c

3055

return intel_update_topdown_event(event, INTEL_PMC_IDX_METRIC_BASE +

arch/x86/events/intel/core.c

3315

case INTEL_PMC_IDX_METRIC_BASE ... INTEL_PMC_IDX_METRIC_END:

arch/x86/events/perf_event.h

479

EVENT_CONSTRAINT(c, (1ULL << (INTEL_PMC_IDX_METRIC_BASE + n)), \

arch/x86/include/asm/perf_event.h

383

#define INTEL_PMC_IDX_TD_RETIRING (INTEL_PMC_IDX_METRIC_BASE + 0)

arch/x86/include/asm/perf_event.h

384

#define INTEL_PMC_IDX_TD_BAD_SPEC (INTEL_PMC_IDX_METRIC_BASE + 1)

arch/x86/include/asm/perf_event.h

385

#define INTEL_PMC_IDX_TD_FE_BOUND (INTEL_PMC_IDX_METRIC_BASE + 2)

arch/x86/include/asm/perf_event.h

386

#define INTEL_PMC_IDX_TD_BE_BOUND (INTEL_PMC_IDX_METRIC_BASE + 3)

arch/x86/include/asm/perf_event.h

387

#define INTEL_PMC_IDX_TD_HEAVY_OPS (INTEL_PMC_IDX_METRIC_BASE + 4)

arch/x86/include/asm/perf_event.h

388

#define INTEL_PMC_IDX_TD_BR_MISPREDICT (INTEL_PMC_IDX_METRIC_BASE + 5)

arch/x86/include/asm/perf_event.h

389

#define INTEL_PMC_IDX_TD_FETCH_LAT (INTEL_PMC_IDX_METRIC_BASE + 6)

arch/x86/include/asm/perf_event.h

390

#define INTEL_PMC_IDX_TD_MEM_BOUND (INTEL_PMC_IDX_METRIC_BASE + 7)

arch/x86/include/asm/perf_event.h

392

#define INTEL_PMC_MSK_TOPDOWN ((0xffull << INTEL_PMC_IDX_METRIC_BASE) | \

arch/x86/include/asm/perf_event.h

424

return (unsigned)(idx - INTEL_PMC_IDX_METRIC_BASE) < INTEL_TD_METRIC_NUM;