Symbol: INTEL_LT_PHY_LANE1
drivers/gpu/drm/i915/display/intel_lt_phy.c
1913
intel_lt_phy_p2p_write(encoder, INTEL_LT_PHY_LANE1, LT_PHY_TXY_CTL10(0),
drivers/gpu/drm/i915/display/intel_lt_phy.c
1917
intel_lt_phy_p2p_write(encoder, INTEL_LT_PHY_LANE1, LT_PHY_TXY_CTL10(0),
drivers/gpu/drm/i915/display/intel_lt_phy.c
1922
intel_lt_phy_p2p_write(encoder, INTEL_LT_PHY_LANE1, LT_PHY_TXY_CTL10(1),
drivers/gpu/drm/i915/display/intel_lt_phy.c
1926
intel_lt_phy_p2p_write(encoder, INTEL_LT_PHY_LANE1, LT_PHY_TXY_CTL10(1),
drivers/gpu/drm/i915/display/intel_lt_phy.c
2166
u8 lane_mask = lane == 0 ? INTEL_LT_PHY_LANE0 : INTEL_LT_PHY_LANE1;
drivers/gpu/drm/i915/display/intel_lt_phy.c
2243
lane = owned_lane_mask & INTEL_LT_PHY_LANE0 ? : INTEL_LT_PHY_LANE1;
drivers/gpu/drm/i915/display/intel_lt_phy.c
31
#define INTEL_LT_PHY_BOTH_LANES (INTEL_LT_PHY_LANE1 |\