drivers/gpu/drm/i915/display/intel_lt_phy.c

1018

return INTEL_LT_PHY_BOTH_LANES;

drivers/gpu/drm/i915/display/intel_lt_phy.c

1021

? INTEL_LT_PHY_BOTH_LANES : INTEL_LT_PHY_LANE0;

drivers/gpu/drm/i915/display/intel_lt_phy.c

1176

u32 lane_pipe_reset = owned_lane_mask == INTEL_LT_PHY_BOTH_LANES

drivers/gpu/drm/i915/display/intel_lt_phy.c

1179

u32 lane_phy_current_status = owned_lane_mask == INTEL_LT_PHY_BOTH_LANES

drivers/gpu/drm/i915/display/intel_lt_phy.c

1183

u32 lane_phy_pulse_status = owned_lane_mask == INTEL_LT_PHY_BOTH_LANES

drivers/gpu/drm/i915/display/intel_lt_phy.c

1941

u32 lane_phy_pulse_status = owned_lane_mask == INTEL_LT_PHY_BOTH_LANES

drivers/gpu/drm/i915/display/intel_lt_phy.c

2070

u32 lane_pipe_reset = owned_lane_mask == INTEL_LT_PHY_BOTH_LANES

drivers/gpu/drm/i915/display/intel_lt_phy.c

2074

u32 lane_phy_current_status = owned_lane_mask == INTEL_LT_PHY_BOTH_LANES

drivers/gpu/drm/i915/display/intel_lt_phy.c

2078

u32 lane_phy_pulse_status = owned_lane_mask == INTEL_LT_PHY_BOTH_LANES