AR5K_CR
REG_STRUCT_INIT(AR5K_CR),
if (ath5k_hw_reg_read(ah, AR5K_CR) & AR5K_CR_RXE) {
tx_queue = ath5k_hw_reg_read(ah, AR5K_CR);
ath5k_hw_reg_write(ah, tx_queue, AR5K_CR);
ath5k_hw_reg_read(ah, AR5K_CR);
tx_queue = ath5k_hw_reg_read(ah, AR5K_CR);
ath5k_hw_reg_write(ah, tx_queue, AR5K_CR);
ath5k_hw_reg_read(ah, AR5K_CR);
ath5k_hw_reg_write(ah, AR5K_CR_RXE, AR5K_CR);
ath5k_hw_reg_read(ah, AR5K_CR);
ath5k_hw_reg_write(ah, AR5K_CR_RXD, AR5K_CR);
(ath5k_hw_reg_read(ah, AR5K_CR) & AR5K_CR_RXE) != 0;
{ AR5K_CR, 0 },