IMX91_TMU_CTRL1
tmu->base + IMX91_TMU_CTRL1 + REG_CLR);
tmu->base + IMX91_TMU_CTRL1 + REG_SET);
writel_relaxed(IMX91_TMU_CTRL1_MEAS_MODE_MASK, tmu->base + IMX91_TMU_CTRL1 + REG_CLR);
tmu->base + IMX91_TMU_CTRL1 + REG_SET);
writel_relaxed(val, tmu->base + IMX91_TMU_CTRL1 + REG_SET);
u32 reg = IMX91_TMU_CTRL1;