IMX6SX_CLK_SSI3_PODF
hws[IMX6SX_CLK_SSI3_PODF] = imx_clk_hw_divider("ssi3_podf", "ssi3_pred", base + 0x28, 16, 6);
clk_set_rate(hws[IMX6SX_CLK_SSI3_PODF]->clk, 24576000);