IMX6SX_CLK_SSI2_PODF
hws[IMX6SX_CLK_SSI2_PODF] = imx_clk_hw_divider("ssi2_podf", "ssi2_pred", base + 0x2c, 0, 6);
clk_set_rate(hws[IMX6SX_CLK_SSI2_PODF]->clk, 24576000);