IMX7D_PLL_ARM_MAIN_CLK
hws[IMX7D_PLL_ARM_MAIN_CLK] = imx_clk_hw_gate("pll_arm_main_clk", "pll_arm_main_bypass", base + 0x60, 13);
hws[IMX7D_PLL_ARM_MAIN_CLK]->clk,