IMX6SL_CLK_USBPHY2_GATE
hws[IMX6SL_CLK_USBPHY2_GATE] = imx_clk_hw_gate("usbphy2_gate", "dummy", base + 0x20, 6);
clk_prepare_enable(hws[IMX6SL_CLK_USBPHY2_GATE]->clk);