arch/riscv/kvm/aia_imsic.c

135

imsic_swap_switchcase_64(IMSIC_EIP0, val)

arch/riscv/kvm/aia_imsic.c

174

imsic_write_switchcase_64(IMSIC_EIP0, val)

arch/riscv/kvm/aia_imsic.c

211

imsic_set_switchcase_64(IMSIC_EIP0, val)

arch/riscv/kvm/aia_imsic.c

291

case IMSIC_EIP0 ... IMSIC_EIP63:

arch/riscv/kvm/aia_imsic.c

292

num = isel - IMSIC_EIP0;

arch/riscv/kvm/aia_imsic.c

327

case IMSIC_EIP0 ... IMSIC_EIP63:

arch/riscv/kvm/aia_imsic.c

329

if (isel >= IMSIC_EIP0 && isel <= IMSIC_EIP63) {

arch/riscv/kvm/aia_imsic.c

331

num = isel - IMSIC_EIP0;

arch/riscv/kvm/aia_imsic.c

397

eix->eip[0] = imsic_eix_swap(IMSIC_EIP0 + i * 2, 0);

arch/riscv/kvm/aia_imsic.c

400

eix->eip[1] = imsic_eix_swap(IMSIC_EIP0 + i * 2 + 1, 0);

arch/riscv/kvm/aia_imsic.c

409

eix->eip[0] = imsic_eix_read(IMSIC_EIP0 + i * 2);

arch/riscv/kvm/aia_imsic.c

412

eix->eip[1] = imsic_eix_read(IMSIC_EIP0 + i * 2 + 1);

arch/riscv/kvm/aia_imsic.c

471

case IMSIC_EIP0 ... IMSIC_EIP63:

arch/riscv/kvm/aia_imsic.c

538

imsic_eix_write(IMSIC_EIP0 + i * 2, 0);

arch/riscv/kvm/aia_imsic.c

541

imsic_eix_write(IMSIC_EIP0 + i * 2 + 1, 0);

arch/riscv/kvm/aia_imsic.c

575

imsic_eix_set(IMSIC_EIP0 + i * 2, eix->eip[0]);

arch/riscv/kvm/aia_imsic.c

578

imsic_eix_set(IMSIC_EIP0 + i * 2 + 1, eix->eip[1]);

arch/riscv/kvm/aia_imsic.c

95

imsic_read_switchcase_64(IMSIC_EIP0)

drivers/irqchip/irq-riscv-imsic-state.c

73

isel += pend ? IMSIC_EIP0 : IMSIC_EIE0;

drivers/irqchip/irq-riscv-imsic-state.c

97

isel += pend ? IMSIC_EIP0 : IMSIC_EIE0;