IMGU_REG_SP_DMEM_BASE
struct imgu_abi_queues __iomem *q = base + IMGU_REG_SP_DMEM_BASE(sp) +
struct imgu_abi_queues __iomem *q = base + IMGU_REG_SP_DMEM_BASE(sp) +
struct imgu_abi_queues __iomem *q = base + IMGU_REG_SP_DMEM_BASE(sp) +
u32 cnt = readl(base + IMGU_REG_SP_DMEM_BASE(0) +
u32 val = readl(base + IMGU_REG_SP_DMEM_BASE(0) +
IMGU_REG_SP_DMEM_BASE(sp) + bi->info.sp.init_dmem_data);
if (imgu_hw_wait(css->base, IMGU_REG_SP_DMEM_BASE(sp)
base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.per_frame_data);
base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.sw_state);
writel(1, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.invalidate_tlb);
writel(0, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.isp_started);
writel(0, base + IMGU_REG_SP_DMEM_BASE(0) +
writel(0, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.sleep_mode);
writel(0, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.invalidate_tlb);
writel(IMGU_ABI_SP_COMM_COMMAND_READY, base + IMGU_REG_SP_DMEM_BASE(0)
writel(event_mask, base + IMGU_REG_SP_DMEM_BASE(0)
writel(1, base + IMGU_REG_SP_DMEM_BASE(0) +
base + IMGU_REG_SP_DMEM_BASE(1) + bi->info.sp.sw_state);
writel(IMGU_ABI_SP_COMM_COMMAND_READY, base + IMGU_REG_SP_DMEM_BASE(1)
base + IMGU_REG_SP_DMEM_BASE(0) +
if (readl(base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.sw_state) !=