Symbol: APMU_SDH2
drivers/clk/mmp/clk-of-mmp2.c
368
{MMP2_CLK_SDH2, "sdh2_clk", "sdh_mix_clk", CLK_SET_RATE_PARENT, APMU_SDH2, 0x1b, 0x1b, 0x0, 0, &sdh_lock},
drivers/clk/mmp/clk-of-pxa168.c
236
{0, "sdh2_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH2, 6, 2, 0, &sdh2_lock},
drivers/clk/mmp/clk-of-pxa168.c
253
{PXA168_CLK_SDH2, "sdh2_clk", "sdh2_mux", CLK_SET_RATE_PARENT, APMU_SDH2, 0x12, 0x12, 0x0, 0, &sdh2_lock},
drivers/clk/mmp/clk-of-pxa168.c
257
{PXA168_CLK_SDH23_AXI, "sdh23_axi_clk", NULL, CLK_SET_RATE_PARENT, APMU_SDH2, 0x9, 0x9, 0x0, 0, &sdh2_lock},
drivers/clk/mmp/clk-pxa1908-apmu.c
59
{PXA1908_CLK_SDH2, "sdh2_clk", "sdh2_mix_clk", CLK_SET_RATE_PARENT | CLK_SET_RATE_UNGATE, APMU_SDH2, 0x12, 0x12, 0x0, 0, &sdh2_lock}
drivers/clk/mmp/clk-pxa1908-apmu.c
77
sdh_mix_config.reg_info.reg_clk_ctrl = pxa_unit->base + APMU_SDH2;