APIC_LVTCMCI
v = apic_read(APIC_LVTCMCI);
apic_write(APIC_LVTCMCI, v | APIC_LVT_MASKED);
apic_pm_state.apic_cmci = apic_read(APIC_LVTCMCI);
apic_write(APIC_LVTCMCI, apic_pm_state.apic_cmci);
apic_write(APIC_LVTCMCI, THRESHOLD_APIC_VECTOR|APIC_DM_FIXED);
valid_reg_mask |= APIC_REG_MASK(APIC_LVTCMCI);
if (reg == APIC_LVTCMCI)
case APIC_LVTCMCI: {
#define APIC_LVTx(x) ((x) == LVT_CMCI ? APIC_LVTCMCI : APIC_LVTT + 0x10 * (x))
case X2APIC_MSR(APIC_LVTCMCI):
kvm_apic_local_deliver(vcpu->arch.apic, APIC_LVTCMCI);
xapic_write_reg(APIC_LVTCMCI, CMCI_VECTOR | APIC_DM_FIXED);