arch/x86/include/asm/apic.h

229

wrmsrq(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low);

arch/x86/include/asm/apic.h

236

rdmsrq(APIC_BASE_MSR + (APIC_ICR >> 4), val);

arch/x86/include/asm/apic.h

547

BUILD_BUG_ON(reg != APIC_ICR);

arch/x86/include/asm/apic.h

553

BUILD_BUG_ON(reg != APIC_ICR);

arch/x86/kernel/apic/apic.c

1247

apic_write(APIC_ICR, APIC_DEST_ALLINC | APIC_INT_LEVELTRIG | APIC_DM_INIT);

arch/x86/kernel/apic/apic.c

231

apic_write(APIC_ICR, low);

arch/x86/kernel/apic/apic.c

240

icr1 = apic_read(APIC_ICR);

arch/x86/kernel/apic/ipi.c

121

if (!(apic_read(APIC_ICR) & APIC_ICR_BUSY))

arch/x86/kernel/apic/ipi.c

131

while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY)

arch/x86/kernel/apic/ipi.c

167

native_apic_mem_write(APIC_ICR, __prepare_ICR(shortcut, vector, 0));

arch/x86/kernel/apic/ipi.c

186

native_apic_mem_write(APIC_ICR, __prepare_ICR(0, vector, dest_mode));

arch/x86/kernel/apic/x2apic_savic.c

196

savic_ghcb_msr_write(APIC_ICR, icr_data);

arch/x86/kernel/apic/x2apic_savic.c

197

apic_set_reg64(this_cpu_ptr(savic_page), APIC_ICR, icr_data);

arch/x86/kernel/apic/x2apic_savic.c

226

case APIC_ICR:

arch/x86/kernel/apic/x2apic_savic.c

90

case APIC_ICR:

arch/x86/kvm/hyperv.c

1584

return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);

arch/x86/kvm/hyperv.c

1703

return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);

arch/x86/kvm/lapic.c

1749

APIC_REG_MASK(APIC_ICR) |

arch/x86/kvm/lapic.c

1800

WARN_ON_ONCE(apic_x2apic_mode(apic) && offset == APIC_ICR);

arch/x86/kvm/lapic.c

2482

case APIC_ICR:

arch/x86/kvm/lapic.c

2488

kvm_lapic_set_reg(apic, APIC_ICR, val);

arch/x86/kvm/lapic.c

2648

kvm_lapic_set_reg(apic, APIC_ICR, data);

arch/x86/kvm/lapic.c

2651

kvm_lapic_set_reg64(apic, APIC_ICR, data);

arch/x86/kvm/lapic.c

2653

trace_kvm_apic_write(APIC_ICR, data);

arch/x86/kvm/lapic.c

2670

return (u64)kvm_lapic_get_reg(apic, APIC_ICR) |

arch/x86/kvm/lapic.c

2673

return kvm_lapic_get_reg64(apic, APIC_ICR);

arch/x86/kvm/lapic.c

2695

if (apic_x2apic_mode(apic) && offset == APIC_ICR)

arch/x86/kvm/lapic.c

3006

kvm_lapic_set_reg(apic, APIC_ICR, 0);

arch/x86/kvm/lapic.c

3009

kvm_lapic_set_reg64(apic, APIC_ICR, 0);

arch/x86/kvm/lapic.c

3280

icr = apic_get_reg(s->regs, APIC_ICR) |

arch/x86/kvm/lapic.c

3282

apic_set_reg64(s->regs, APIC_ICR, icr);

arch/x86/kvm/lapic.c

3284

icr = apic_get_reg64(s->regs, APIC_ICR);

arch/x86/kvm/lapic.c

3484

if (reg == APIC_ICR) {

arch/x86/kvm/lapic.c

3504

if (reg == APIC_ICR)

arch/x86/kvm/svm/avic.c

144

svm_set_intercept_for_msr(vcpu, X2APIC_MSR(APIC_ICR), MSR_TYPE_W, intercept);

arch/x86/kvm/svm/avic.c

639

kvm_apic_write_nodecode(vcpu, APIC_ICR);

arch/x86/kvm/svm/avic.c

795

case APIC_ICR:

arch/x86/kvm/vmx/tdx.c

2197

case X2APIC_MSR(APIC_ICR):

arch/x86/kvm/vmx/vmx.c

4189

vmx_disable_intercept_for_msr(vcpu, X2APIC_MSR(APIC_ICR), MSR_TYPE_RW);

arch/x86/kvm/x86.c

2261

case APIC_BASE_MSR + (APIC_ICR >> 4):

tools/testing/selftests/kvm/x86/debug_regs.c

68

x2apic_write_reg(APIC_ICR, APIC_DEST_SELF | APIC_INT_ASSERT |

tools/testing/selftests/kvm/x86/smm_test.c

51

x2apic_write_reg(APIC_ICR,

tools/testing/selftests/kvm/x86/svm_int_ctl_test.c

42

x2apic_write_reg(APIC_ICR,

tools/testing/selftests/kvm/x86/svm_nested_soft_inject_test.c

112

x2apic_write_reg(APIC_ICR, APIC_DEST_SELF | APIC_INT_ASSERT | APIC_DM_NMI);

tools/testing/selftests/kvm/x86/vmx_apicv_updates_test.c

56

xapic_write_reg(APIC_ICR, APIC_DEST_SELF | APIC_DM_FIXED | GOOD_IPI_VECTOR);

tools/testing/selftests/kvm/x86/vmx_apicv_updates_test.c

78

xapic_write_reg(APIC_ICR, APIC_DEST_SELF | APIC_DM_FIXED | BAD_IPI_VECTOR);

tools/testing/selftests/kvm/x86/vmx_apicv_updates_test.c

99

xapic_write_reg(APIC_ICR, APIC_DEST_SELF | APIC_DM_FIXED | GOOD_IPI_VECTOR);

tools/testing/selftests/kvm/x86/xapic_ipi_test.c

164

xapic_write_reg(APIC_ICR, icr_val);

tools/testing/selftests/kvm/x86/xapic_state_test.c

30

xapic_write_reg(APIC_ICR, val);

tools/testing/selftests/kvm/x86/xapic_state_test.c

50

x2apic_write_reg_fault(APIC_ICR, val);

tools/testing/selftests/kvm/x86/xapic_state_test.c

52

x2apic_write_reg(APIC_ICR, val);

tools/testing/selftests/kvm/x86/xapic_state_test.c

53

GUEST_ASSERT_EQ(x2apic_read_reg(APIC_ICR), val);

tools/testing/selftests/kvm/x86/xapic_state_test.c

81

icr = (u64)(*((u32 *)&xapic.regs[APIC_ICR])) |

tools/testing/selftests/kvm/x86/xapic_tpr_test.c

68

xapic_write_reg(APIC_ICR, icr);