ID_AA64MMFR0_EL1_TGRAN_SHIFT
ID_AA64MMFR0_EL1_TGRAN_SHIFT);
ID_AA64MMFR0_EL1_TGRAN_SHIFT);
ID_AA64MMFR0_EL1_TGRAN_SHIFT);
(ID_AA64MMFR0_EL1_TGRAN_LPA2 - 1) << ID_AA64MMFR0_EL1_TGRAN_SHIFT;
id_aa64mmfr0_override.mask |= 0xfU << ID_AA64MMFR0_EL1_TGRAN_SHIFT;
tg = (read_cpuid(ID_AA64MMFR0_EL1) >> ID_AA64MMFR0_EL1_TGRAN_SHIFT) & 0xf;