drivers/gpu/drm/i915/display/intel_cx0_phy.c

3608

return ICL_PORT_DPLL_DEFAULT;

drivers/gpu/drm/i915/display/intel_ddi.c

4234

enum icl_port_dpll_id port_dpll_id = ICL_PORT_DPLL_DEFAULT;

drivers/gpu/drm/i915/display/intel_ddi.c

4298

mtl_ddi_cx0_get_config(encoder, crtc_state, ICL_PORT_DPLL_DEFAULT,

drivers/gpu/drm/i915/display/intel_ddi.c

4308

mtl_ddi_cx0_get_config(encoder, crtc_state, ICL_PORT_DPLL_DEFAULT,

drivers/gpu/drm/i915/display/intel_ddi.c

4360

return ICL_PORT_DPLL_DEFAULT;

drivers/gpu/drm/i915/display/intel_ddi.c

4363

return ICL_PORT_DPLL_DEFAULT;

drivers/gpu/drm/i915/display/intel_ddi.c

4373

return ICL_PORT_DPLL_DEFAULT;

drivers/gpu/drm/i915/display/intel_ddi.c

4391

port_dpll_id = ICL_PORT_DPLL_DEFAULT;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3323

enum icl_port_dpll_id port_dpll_id = ICL_PORT_DPLL_DEFAULT;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3344

&crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3360

icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3376

&crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3438

&crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3442

port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3457

icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3474

&crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3478

port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3504

port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3524

&crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

3580

for (id = ICL_PORT_DPLL_DEFAULT; id < ICL_PORT_DPLL_COUNT; id++) {

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4480

&crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4488

icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4507

port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4518

icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4655

&crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4663

icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4682

port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

4693

icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT);

drivers/gpu/drm/i915/display/intel_tc.c

1319

is_connected = port_pll_type == ICL_PORT_DPLL_DEFAULT;

drivers/gpu/drm/i915/display/intel_tc.c

1327

port_pll_type == ICL_PORT_DPLL_DEFAULT ? "tbt" : "non-tbt");

drivers/gpu/drm/i915/display/intel_tc.c

1633

enum icl_port_dpll_id pll_type = ICL_PORT_DPLL_DEFAULT;