IDB_QUEUE
priv->regs + TSI721_IDQ_SIZE(IDB_QUEUE));
priv->regs + TSI721_IDQ_BASEU(IDB_QUEUE));
priv->regs + TSI721_IDQ_BASEL(IDB_QUEUE));
iowrite32(0, priv->regs + TSI721_IDQ_MASK(IDB_QUEUE));
iowrite32(TSI721_IDQ_INIT, priv->regs + TSI721_IDQ_CTL(IDB_QUEUE));
iowrite32(0, priv->regs + TSI721_IDQ_RP(IDB_QUEUE));
regval = ioread32(priv->regs + TSI721_SR_CHINTE(IDB_QUEUE));
priv->regs + TSI721_SR_CHINTE(IDB_QUEUE));
wr_ptr = ioread32(priv->regs + TSI721_IDQ_WP(IDB_QUEUE)) % IDB_QSIZE;
rd_ptr = ioread32(priv->regs + TSI721_IDQ_RP(IDB_QUEUE)) % IDB_QSIZE;
TSI721_IDQ_WP(IDB_QUEUE)) % IDB_QSIZE;
priv->regs + TSI721_IDQ_RP(IDB_QUEUE));
regval = ioread32(priv->regs + TSI721_SR_CHINTE(IDB_QUEUE));
priv->regs + TSI721_SR_CHINTE(IDB_QUEUE));
wr_ptr = ioread32(priv->regs + TSI721_IDQ_WP(IDB_QUEUE)) % IDB_QSIZE;
if (dev_ch_int & TSI721_INT_SR2PC_CHAN(IDB_QUEUE)) {
TSI721_SR_CHINT(IDB_QUEUE));
priv->regs + TSI721_SR_CHINT(IDB_QUEUE));
ioread32(priv->regs + TSI721_SR_CHINT(IDB_QUEUE));
priv->regs + TSI721_SR_CHINT(IDB_QUEUE));
priv->regs + TSI721_SR_CHINTE(IDB_QUEUE));
intr = TSI721_INT_SR2PC_CHAN(IDB_QUEUE) |
intr = TSI721_INT_SR2PC_CHAN(IDB_QUEUE);
sr_ch_int = ioread32(priv->regs + TSI721_SR_CHINT(IDB_QUEUE));
iowrite32(sr_ch_int, priv->regs + TSI721_SR_CHINT(IDB_QUEUE));
sr_ch_int = ioread32(priv->regs + TSI721_SR_CHINT(IDB_QUEUE));
entries[TSI721_VECT_IDB].entry = TSI721_MSIX_SR2PC_IDBQ_RCV(IDB_QUEUE);