arch/arm/mach-pxa/irq.c

159

__raw_writel(0, base + ICMR); /* disable all IRQs */

arch/arm/mach-pxa/irq.c

188

saved_icmr[i] = __raw_readl(base + ICMR);

arch/arm/mach-pxa/irq.c

189

__raw_writel(0, base + ICMR);

arch/arm/mach-pxa/irq.c

207

__raw_writel(saved_icmr[i], base + ICMR);

arch/arm/mach-pxa/irq.c

69

uint32_t icmr = __raw_readl(base + ICMR);

arch/arm/mach-pxa/irq.c

72

__raw_writel(icmr, base + ICMR);

arch/arm/mach-pxa/irq.c

79

uint32_t icmr = __raw_readl(base + ICMR);

arch/arm/mach-pxa/irq.c

82

__raw_writel(icmr, base + ICMR);

arch/arm/mach-pxa/irq.c

98

icmr = __raw_readl(pxa_irq_base + ICMR);

arch/arm/mach-sa1100/include/mach/mtd-xip.h

17

#define xip_irqpending() (ICIP & ICMR)

arch/arm/mach-sa1100/pm.c

95

ICMR = 0;

drivers/irqchip/irq-sa11x0.c

100

writel_relaxed(st->icmr & 0xfffff000, iobase + ICMR);

drivers/irqchip/irq-sa11x0.c

113

writel_relaxed(st->icmr, iobase + ICMR);

drivers/irqchip/irq-sa11x0.c

140

icmr = readl_relaxed(iobase + ICMR);

drivers/irqchip/irq-sa11x0.c

158

writel_relaxed(0, iobase + ICMR);

drivers/irqchip/irq-sa11x0.c

38

reg = readl_relaxed(iobase + ICMR);

drivers/irqchip/irq-sa11x0.c

40

writel_relaxed(reg, iobase + ICMR);

drivers/irqchip/irq-sa11x0.c

47

reg = readl_relaxed(iobase + ICMR);

drivers/irqchip/irq-sa11x0.c

49

writel_relaxed(reg, iobase + ICMR);

drivers/irqchip/irq-sa11x0.c

93

st->icmr = readl_relaxed(iobase + ICMR);