drivers/i2c/busses/i2c-rcar.c

196

return !!(rcar_i2c_read(priv, ICMCR) & FSCL);

drivers/i2c/busses/i2c-rcar.c

208

rcar_i2c_write(priv, ICMCR, priv->recovery_icmcr);

drivers/i2c/busses/i2c-rcar.c

220

rcar_i2c_write(priv, ICMCR, priv->recovery_icmcr);

drivers/i2c/busses/i2c-rcar.c

227

return !(rcar_i2c_read(priv, ICMCR) & FSDA);

drivers/i2c/busses/i2c-rcar.c

242

rcar_i2c_write(priv, ICMCR, MDBS);

drivers/i2c/busses/i2c-rcar.c

275

ret = readl_poll_timeout(priv->io + ICMCR, val, !(val & FSDA), 10,

drivers/i2c/busses/i2c-rcar.c

427

rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);

drivers/i2c/busses/i2c-rcar.c

593

rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);

drivers/i2c/busses/i2c-rcar.c

644

rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);

drivers/i2c/busses/i2c-rcar.c

646

rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);

drivers/i2c/busses/i2c-rcar.c

786

rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);

drivers/i2c/busses/i2c-rcar.c

811

rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);